Lines Matching +full:exynos5 +full:- +full:sysreg

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Sam Protsenko <semen.protsenko@linaro.org>
11   - Krzysztof Kozlowski <krzk@kernel.org>
14   USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
17   child nodes, each representing a serial sub-node device. The mode setting
22     pattern: "^usi@[0-9a-f]+$"
26       - items:
27           - enum:
28               - google,gs101-usi
29               - samsung,exynosautov9-usi
30               - samsung,exynosautov920-usi
31           - const: samsung,exynos850-usi
32       - enum:
33           - samsung,exynos850-usi
39   clock-names: true
43   "#address-cells":
46   "#size-cells":
49   samsung,sysreg:
50     $ref: /schemas/types.yaml#/definitions/phandle-array
52       - items:
53           - description: phandle to System Register syscon node
54           - description: offset of SW_CONF register for this USI controller
64       <include/dt-bindings/soc/samsung,exynos-usi.h> for valid USI mode values.
66   samsung,clkreq-on:
72       multi-master mode. Usually this property is needed if USI mode is set
78   "^i2c@[0-9a-f]+$":
79     $ref: /schemas/i2c/i2c-exynos5.yaml
82   "^serial@[0-9a-f]+$":
86   "^spi@[0-9a-f]+$":
91   - compatible
92   - ranges
93   - "#address-cells"
94   - "#size-cells"
95   - samsung,sysreg
96   - samsung,mode
103           - samsung,exynos850-usi
112         - description: Bus (APB) clock
113         - description: Operating clock for UART/SPI/I2C protocol
115     clock-names:
117         - const: pclk
118         - const: ipclk
121     - reg
122     - clocks
123     - clock-names
129     clock-names: false
130     samsung,clkreq-on: false
135   - |
136     #include <dt-bindings/interrupt-controller/arm-gic.h>
137     #include <dt-bindings/soc/samsung,exynos-usi.h>
140         compatible = "samsung,exynos850-usi";
142         samsung,sysreg = <&sysreg_peri 0x1010>;
144         samsung,clkreq-on; /* needed for UART mode */
145         #address-cells = <1>;
146         #size-cells = <1>;
149         clock-names = "pclk", "ipclk";
152             compatible = "samsung,exynos850-uart";
156             clock-names = "uart", "clk_uart_baud0";
161             compatible = "samsung,exynos850-hsi2c", "samsung,exynosautov9-hsi2c";
164             #address-cells = <1>;
165             #size-cells = <0>;
167             clock-names = "hsi2c", "hsi2c_pclk";