Lines Matching +full:clock +full:- +full:master
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,geni-se.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
23 - qcom,geni-se-qup
24 - qcom,geni-se-i2c-master-hub
30 clock-names:
38 "#address-cells":
41 "#size-cells":
49 interconnect-names:
50 const: qup-core
55 dma-coherent: true
58 - compatible
59 - reg
60 - clock-names
61 - clocks
62 - "#address-cells"
63 - "#size-cells"
64 - ranges
67 "spi@[0-9a-f]+$":
69 description: GENI serial engine based SPI controller. SPI in master mode
73 $ref: /schemas/spi/qcom,spi-geni-qcom.yaml#
75 "i2c@[0-9a-f]+$":
78 $ref: /schemas/i2c/qcom,i2c-geni-qcom.yaml#
80 "serial@[0-9a-f]+$":
83 $ref: /schemas/serial/qcom,serial-geni-qcom.yaml#
86 - if:
90 const: qcom,geni-se-i2c-master-hub
93 clock-names:
95 - const: s-ahb
99 - description: Slave AHB Clock
104 "spi@[0-9a-f]+$": false
105 "serial@[0-9a-f]+$": false
108 clock-names:
110 - const: m-ahb
111 - const: s-ahb
115 - description: Master AHB Clock
116 - description: Slave AHB Clock
121 - |
122 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
123 #include <dt-bindings/interrupt-controller/arm-gic.h>
126 #address-cells = <2>;
127 #size-cells = <2>;
130 compatible = "qcom,geni-se-qup";
132 clock-names = "m-ahb", "s-ahb";
135 #address-cells = <2>;
136 #size-cells = <2>;
140 compatible = "qcom,geni-i2c";
143 clock-names = "se";
145 pinctrl-names = "default", "sleep";
146 pinctrl-0 = <&qup_1_i2c_5_active>;
147 pinctrl-1 = <&qup_1_i2c_5_sleep>;
148 #address-cells = <1>;
149 #size-cells = <0>;
153 compatible = "qcom,geni-uart";
156 clock-names = "se";
158 pinctrl-names = "default", "sleep";
159 pinctrl-0 = <&qup_1_uart_3_active>;
160 pinctrl-1 = <&qup_1_uart_3_sleep>;