Lines Matching +full:msm +full:- +full:uart

1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/serial/qcom,msm-uartdm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm MSM Serial UARTDM
10   - Andy Gross <agross@kernel.org>
11   - Bjorn Andersson <bjorn.andersson@linaro.org>
12   - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
15   The MSM serial UARTDM hardware is designed for high-speed use cases where the
16   transmit and/or receive channels can be offloaded to a dma-engine. From a
17   software perspective it's mostly compatible with the MSM serial UART except
21   The alias serialN will result in the UART being assigned port N.  If any
22   serialN alias exists, then an alias must exist for each enabled UART.  The
28       - enum:
29           - qcom,msm-uartdm-v1.1
30           - qcom,msm-uartdm-v1.2
31           - qcom,msm-uartdm-v1.3
32           - qcom,msm-uartdm-v1.4
33       - const: qcom,msm-uartdm
38   clock-names:
40       - const: core
41       - const: iface
46   dma-names:
48       - const: tx
49       - const: rx
57   operating-points-v2: true
59   power-domains:
62   qcom,rx-crci:
69   qcom,tx-crci:
79       - description: Main control registers
80       - description: An optional second register location shall specify the GSBI control region.
83   - compatible
84   - clock-names
85   - clocks
86   - interrupts
87   - reg
90   - $ref: /schemas/serial/serial.yaml#
92   - if:
96             const: qcom,msm-uartdm-v1.3
109   - |
110     #include <dt-bindings/interconnect/qcom,msm8996.h>
111     #include <dt-bindings/interrupt-controller/arm-gic.h>
112     #include <dt-bindings/power/qcom-rpmpd.h>
115         compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
119         clock-names = "core", "iface";
121         dma-names = "tx", "rx";
122         power-domains = <&rpmpd MSM8996_VDDCX>;
123         operating-points-v2 = <&uart_opp_table>;