Lines Matching +full:vf610 +full:- +full:lpuart

1 * Freescale low power universal asynchronous receiver/transmitter (lpuart)
4 - compatible :
5   - "fsl,vf610-lpuart" for lpuart compatible with the one integrated
6     on Vybrid vf610 SoC with 8-bit register organization
7   - "fsl,ls1021a-lpuart" for lpuart compatible with the one integrated
8     on LS1021A SoC with 32-bit big-endian register organization
9   - "fsl,ls1028a-lpuart" for lpuart compatible with the one integrated
10     on LS1028A SoC with 32-bit little-endian register organization
11   - "fsl,imx7ulp-lpuart" for lpuart compatible with the one integrated
12     on i.MX7ULP SoC with 32-bit little-endian register organization
13   - "fsl,imx8qxp-lpuart" for lpuart compatible with the one integrated
14     on i.MX8QXP SoC with 32-bit little-endian register organization
15   - "fsl,imx8qm-lpuart" for lpuart compatible with the one integrated
16     on i.MX8QM SoC with 32-bit little-endian register organization
17 - reg : Address and length of the register set for the device
18 - interrupts : Should contain uart interrupt
19 - clocks : phandle + clock specifier pairs, one for each entry in clock-names
20 - clock-names : For vf610/ls1021a/ls1028a/imx7ulp, "ipg" clock is for uart
21   bus/baud clock. For imx8qxp lpuart, "ipg" clock is bus clock that is used
22   to access lpuart controller registers, it also requires "baud" clock for
26 - dmas: A list of two dma specifiers, one for each entry in dma-names.
27 - dma-names: should contain "tx" and "rx".
28 - rs485-rts-active-low, linux,rs485-enabled-at-boot-time: see rs485.txt
35 		compatible = "fsl,vf610-lpuart";
39 		clock-names = "ipg";
42 		dma-names = "rx","tx";