Lines Matching +full:soc +full:- +full:rtc
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/xlnx,zynqmp-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 RTC controller for the Xilinx Zynq MPSoC Real Time Clock.
11 The RTC controller has separate IRQ lines for seconds and alarm.
14 - Michal Simek <michal.simek@amd.com>
17 - $ref: rtc.yaml#
22 - const: xlnx,zynqmp-rtc
23 - items:
24 - enum:
25 - xlnx,versal-rtc
26 - xlnx,versal-net-rtc
27 - const: xlnx,zynqmp-rtc
35 clock-names:
37 - const: rtc
42 interrupt-names:
44 - const: alarm
45 - const: sec
57 power-domains:
61 - compatible
62 - reg
63 - interrupts
64 - interrupt-names
69 - |
70 soc {
71 #address-cells = <2>;
72 #size-cells = <2>;
74 rtc: rtc@ffa60000 {
75 compatible = "xlnx,zynqmp-rtc";
77 interrupt-parent = <&gic>;
79 interrupt-names = "alarm", "sec";
81 clock-names = "rtc";