Lines Matching +full:vendor +full:- +full:extension
1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V ISA extensions
10 - Paul Walmsley <paul.walmsley@sifive.com>
11 - Palmer Dabbelt <palmer@sifive.com>
12 - Conor Dooley <conor@kernel.org>
15 RISC-V has a large number of extensions, some of which are "standard"
16 extensions, meaning they are ratified by RISC-V International, and others
17 are "vendor" extensions.
19 given extension.
21 Once a standard extension has been ratified, no changes in behaviour can be
22 made without the creation of a new extension.
36 Identifies the specific RISC-V instruction set architecture
37 supported by the hart. These are documented in the RISC-V
38 User-Level ISA document, available from
51 pattern: ^rv(?:64|32)imaf?d?q?c?b?k?j?p?v?h?(?:[hsxz](?:[0-9a-z])+)?(?:_[hsxz](?:[0-9a-z])+)*$
54 riscv,isa-base:
59 - rv32i
60 - rv64i
62 riscv,isa-extensions:
63 $ref: /schemas/types.yaml#/definitions/string-array
69 - const: i
78 - const: m
80 The standard M extension for integer multiplication and division, as
84 - const: a
86 The standard A extension for atomic instructions, as ratified in the
89 - const: f
91 The standard F extension for single-precision floating point, as
95 - const: d
97 The standard D extension for double-precision floating-point, as
101 - const: q
103 The standard Q extension for quad-precision floating-point, as
107 - const: c
109 The standard C extension for compressed instructions, as ratified in
112 - const: v
114 The standard V extension for vector operations, as ratified
115 in-and-around commit 7a6c8ae ("Fix text that describes vfmv.v.f
116 encoding") of the riscv-v-spec.
118 - const: h
120 The standard H extension for hypervisors as ratified in the 20191213
123 # multi-letter extensions, sorted alphanumerically
124 - const: smaia
126 The standard Smaia supervisor-level extension for the advanced
127 interrupt architecture for machine-mode-visible csr and behavioural
129 request #42 from riscv/jhauser-2023-RC4") of riscv-aia.
131 - const: smstateen
133 The standard Smstateen extension for controlling access to CSRs
134 added by other RISC-V extensions in H/S/VS/U/VU modes and as
135 ratified at commit a28bfae (Ratified (#7)) of riscv-state-enable.
137 - const: ssaia
139 The standard Ssaia supervisor-level extension for the advanced
140 interrupt architecture for supervisor-mode-visible csr and
142 ("Merge pull request #42 from riscv/jhauser-2023-RC4") of riscv-aia.
144 - const: sscofpmf
146 The standard Sscofpmf supervisor-level extension for count overflow
147 and mode-based filtering as ratified at commit 01d1df0 ("Add ability
148 to manually trigger workflow. (#2)") of riscv-count-overflow.
150 - const: sstc
152 The standard Sstc supervisor-level extension for time compare as
154 workflow. (#2)") of riscv-time-compare.
156 - const: svinval
158 The standard Svinval supervisor-level extension for fine-grained
159 address-translation cache invalidation as ratified in the 20191213
162 - const: svnapot
164 The standard Svnapot supervisor-level extensions for napot
168 - const: svpbmt
170 The standard Svpbmt supervisor-level extensions for page-based
174 - const: zacas
176 The Zacas extension for Atomic Compare-and-Swap (CAS) instructions
178 ratified") of the riscv-zacas.
180 - const: zba
182 The standard Zba bit-manipulation extension for address generation
184 request #158 from hirooih/clmul-fix-loop-end-condition") of
185 riscv-bitmanip.
187 - const: zbb
189 The standard Zbb bit-manipulation extension for basic bit-manipulation
191 hirooih/clmul-fix-loop-end-condition") of riscv-bitmanip.
193 - const: zbc
195 The standard Zbc bit-manipulation extension for carry-less
197 #158 from hirooih/clmul-fix-loop-end-condition") of riscv-bitmanip.
199 - const: zbkb
202 in version 1.0 of RISC-V Cryptography Extensions Volume I
205 - const: zbkc
207 The standard Zbkc carry-less multiply instructions as ratified
208 in version 1.0 of RISC-V Cryptography Extensions Volume I
211 - const: zbkx
214 in version 1.0 of RISC-V Cryptography Extensions Volume I
217 - const: zbs
219 The standard Zbs bit-manipulation extension for single-bit
221 from hirooih/clmul-fix-loop-end-condition") of riscv-bitmanip.
223 - const: zfa
225 The standard Zfa extension for additional floating point
227 riscv-isa-manual.
229 - const: zfh
231 The standard Zfh extension for 16-bit half-precision binary
232 floating-point instructions, as ratified in commit 64074bc ("Update
233 version numbers for Zfh/Zfinx") of riscv-isa-manual.
235 - const: zfhmin
237 The standard Zfhmin extension which provides minimal support for
238 16-bit half-precision binary floating-point instructions, as ratified
240 riscv-isa-manual.
242 - const: zk
244 The standard Zk Standard Scalar cryptography extension as ratified
245 in version 1.0 of RISC-V Cryptography Extensions Volume I
248 - const: zkn
251 version 1.0 of RISC-V Cryptography Extensions Volume I
254 - const: zknd
257 ratified in version 1.0 of RISC-V Cryptography Extensions Volume I
260 - const: zkne
263 ratified in version 1.0 of RISC-V Cryptography Extensions Volume I
266 - const: zknh
269 ratified in version 1.0 of RISC-V Cryptography Extensions Volume I
272 - const: zkr
274 The standard Zkr entropy source extension as ratified in version
275 1.0 of RISC-V Cryptography Extensions Volume I specification.
277 extension is accessible at the privilege level to which that
278 device-tree has been provided.
280 - const: zks
283 version 1.0 of RISC-V Cryptography Extensions Volume I
286 - const: zksed
289 as ratified in version 1.0 of RISC-V Cryptography Extensions
292 - const: zksh
295 as ratified in version 1.0 of RISC-V Cryptography Extensions
298 - const: zkt
301 in version 1.0 of RISC-V Cryptography Extensions Volume I
304 - const: zicbom
306 The standard Zicbom extension for base cache management operations as
307 ratified in commit 3dd606f ("Create cmobase-v1.0.pdf") of riscv-CMOs.
309 - const: zicbop
311 The standard Zicbop extension for cache-block prefetch instructions
312 as ratified in commit 3dd606f ("Create cmobase-v1.0.pdf") of
313 riscv-CMOs.
315 - const: zicboz
317 The standard Zicboz extension for cache-block zeroing as ratified
318 in commit 3dd606f ("Create cmobase-v1.0.pdf") of riscv-CMOs.
320 - const: zicntr
322 The standard Zicntr extension for base counters and timers, as
326 - const: zicond
328 The standard Zicond extension for conditional arithmetic and
329 conditional-select/move operations as ratified in commit 95cf1f9
330 ("Add changes requested by Ved during signoff") of riscv-zicond.
332 - const: zicsr
334 The standard Zicsr extension for control and status register
339 special case read-only CSRs, that were moved into the Zicntr and
343 - const: zifencei
345 The standard Zifencei extension for instruction-fetch fence, as
349 - const: zihintpause
351 The standard Zihintpause extension for pause hints, as ratified in
352 commit d8ab5c7 ("Zihintpause is ratified") of the riscv-isa-manual.
354 - const: zihintntl
356 The standard Zihintntl extension for non-temporal locality hints, as
358 riscv-isa-manual.
360 - const: zihpm
362 The standard Zihpm extension for hardware performance counters, as
366 - const: ztso
368 The standard Ztso extension for total store ordering, as ratified
370 riscv-isa-manual.
372 - const: zvbb
374 The standard Zvbb extension for vectored basic bit-manipulation
376 riscv-crypto-spec-vector.adoc") of riscv-crypto.
378 - const: zvbc
380 The standard Zvbc extension for vectored carryless multiplication
382 riscv-crypto-spec-vector.adoc") of riscv-crypto.
384 - const: zvfh
386 The standard Zvfh extension for vectored half-precision
387 floating-point instructions, as ratified in commit e2ccd05
388 ("Remove draft warnings from Zvfh[min]") of riscv-v-spec.
390 - const: zvfhmin
392 The standard Zvfhmin extension for vectored minimal half-precision
393 floating-point instructions, as ratified in commit e2ccd05
394 ("Remove draft warnings from Zvfh[min]") of riscv-v-spec.
396 - const: zvkb
398 The standard Zvkb extension for vector cryptography bit-manipulation
400 riscv-crypto-spec-vector.adoc") of riscv-crypto.
402 - const: zvkg
404 The standard Zvkg extension for vector GCM/GMAC instructions, as
405 ratified in commit 56ed795 ("Update riscv-crypto-spec-vector.adoc")
406 of riscv-crypto.
408 - const: zvkn
410 The standard Zvkn extension for NIST algorithm suite instructions, as
411 ratified in commit 56ed795 ("Update riscv-crypto-spec-vector.adoc")
412 of riscv-crypto.
414 - const: zvknc
416 The standard Zvknc extension for NIST algorithm suite with carryless
418 riscv-crypto-spec-vector.adoc") of riscv-crypto.
420 - const: zvkned
422 The standard Zvkned extension for Vector AES block cipher
424 riscv-crypto-spec-vector.adoc") of riscv-crypto.
426 - const: zvkng
428 The standard Zvkng extension for NIST algorithm suite with GCM
430 riscv-crypto-spec-vector.adoc") of riscv-crypto.
432 - const: zvknha
434 The standard Zvknha extension for NIST suite: vector SHA-2 secure,
435 hash (SHA-256 only) instructions, as ratified in commit
436 56ed795 ("Update riscv-crypto-spec-vector.adoc") of riscv-crypto.
438 - const: zvknhb
440 The standard Zvknhb extension for NIST suite: vector SHA-2 secure,
441 hash (SHA-256 and SHA-512) instructions, as ratified in commit
442 56ed795 ("Update riscv-crypto-spec-vector.adoc") of riscv-crypto.
444 - const: zvks
446 The standard Zvks extension for ShangMi algorithm suite
448 riscv-crypto-spec-vector.adoc") of riscv-crypto.
450 - const: zvksc
452 The standard Zvksc extension for ShangMi algorithm suite with
454 ("Update riscv-crypto-spec-vector.adoc") of riscv-crypto.
456 - const: zvksed
458 The standard Zvksed extension for ShangMi suite: SM4 block cipher
460 riscv-crypto-spec-vector.adoc") of riscv-crypto.
462 - const: zvksh
464 The standard Zvksh extension for ShangMi suite: SM3 secure hash
466 riscv-crypto-spec-vector.adoc") of riscv-crypto.
468 - const: zvksg
470 The standard Zvksg extension for ShangMi algorithm suite with GCM
472 riscv-crypto-spec-vector.adoc") of riscv-crypto.
474 - const: zvkt
476 The standard Zvkt extension for vector data-independent execution
478 riscv-crypto-spec-vector.adoc") of riscv-crypto.