Lines Matching +full:imx7d +full:- +full:pcie
8 - compatible:
9 - For i.MX7 SoCs should be "fsl,imx7d-src", "syscon"
10 - For i.MX8MQ SoCs should be "fsl,imx8mq-src", "syscon"
11 - For i.MX8MM SoCs should be "fsl,imx8mm-src", "fsl,imx8mq-src", "syscon"
12 - For i.MX8MN SoCs should be "fsl,imx8mn-src", "fsl,imx8mq-src", "syscon"
13 - For i.MX8MP SoCs should be "fsl,imx8mp-src", "syscon"
14 - reg: should be register base and length as documented in the
16 - interrupts: Should contain SRC interrupt
17 - #reset-cells: 1, see below
21 src: reset-controller@30390000 {
22 compatible = "fsl,imx7d-src", "syscon";
25 #reset-cells = <1>;
39 pcie: pcie@33800000 {
45 reset-names = "pciephy", "apps";
52 <dt-bindings/reset/imx7-reset.h> for i.MX7,
53 <dt-bindings/reset/imx8mq-reset.h> for i.MX8MQ and
54 <dt-bindings/reset/imx8mq-reset.h> for i.MX8MM and
55 <dt-bindings/reset/imx8mq-reset.h> for i.MX8MN and
56 <dt-bindings/reset/imx8mp-reset.h> for i.MX8MP