Lines Matching +full:memory +full:- +full:region +full:- +full:names
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-dsp-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems
14 that are used to offload some of the processor-intensive tasks or algorithms,
17 These processor sub-systems usually contain additional sub-modules like
18 L1 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory
23 Each DSP Core sub-system is represented as a single DT node. Each node has a
29 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
34 - ti,am62a-c7xv-dsp
35 - ti,j721e-c66-dsp
36 - ti,j721e-c71-dsp
37 - ti,j721s2-c71-dsp
39 Use "ti,am62a-c7xv-dsp" for AM62A Deep learning DSPs on K3 AM62A SoCs
40 Use "ti,j721e-c66-dsp" for C66x DSPs on K3 J721E SoCs
41 Use "ti,j721e-c71-dsp" for C71x DSPs on K3 J721E SoCs
42 Use "ti,j721s2-c71-dsp" for C71x DSPs on K3 J721S2 SoCs
50 firmware-name:
57 OMAP Mailbox specifier denoting the sub-mailbox, to be used for
59 with the sub-mailbox node used in the firmware image.
62 memory-region:
66 phandle to the reserved memory nodes to be associated with the remoteproc
67 device. There should be at least two reserved memory nodes defined. The
68 reserved memory nodes should be carveout nodes, and should be defined as
70 Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
72 - description: region used for dynamic DMA allocations like vrings and
74 - description: region reserved for firmware image sections
78 # --------------------
81 $ref: /schemas/types.yaml#/definitions/phandle-array
87 phandles to one or more reserved on-chip SRAM regions. The regions
96 - ti,j721e-c66-dsp
101 - description: Address and Size of the L2 SRAM internal memory region
102 - description: Address and Size of the L1 PRAM internal memory region
103 - description: Address and Size of the L1 DRAM internal memory region
104 reg-names:
106 - const: l2sram
107 - const: l1pram
108 - const: l1dram
114 - ti,am62a-c7xv-dsp
115 - ti,j721e-c71-dsp
116 - ti,j721s2-c71-dsp
121 - description: Address and Size of the L2 SRAM internal memory region
122 - description: Address and Size of the L1 DRAM internal memory region
123 reg-names:
125 - const: l2sram
126 - const: l1dram
129 - compatible
130 - reg
131 - reg-names
132 - ti,sci
133 - ti,sci-dev-id
134 - ti,sci-proc-ids
135 - resets
136 - firmware-name
137 - mboxes
138 - memory-region
143 - |
145 #address-cells = <2>;
146 #size-cells = <2>;
148 mailbox0_cluster3: mailbox-0 {
149 #mbox-cells = <1>;
152 mailbox0_cluster4: mailbox-1 {
153 #mbox-cells = <1>;
157 compatible = "simple-bus";
158 #address-cells = <2>;
159 #size-cells = <2>;
167 compatible = "ti,j721e-c66-dsp";
171 reg-names = "l2sram", "l1pram", "l1dram";
173 ti,sci-dev-id = <142>;
174 ti,sci-proc-ids = <0x03 0xFF>;
176 firmware-name = "j7-c66_0-fw";
177 memory-region = <&c66_0_dma_memory_region>,
184 compatible = "ti,j721e-c71-dsp";
187 reg-names = "l2sram", "l1dram";
189 ti,sci-dev-id = <15>;
190 ti,sci-proc-ids = <0x30 0xFF>;
192 firmware-name = "j7-c71_0-fw";
193 memory-region = <&c71_0_dma_memory_region>,