Lines Matching +full:fu540 +full:- +full:c000 +full:- +full:plic
10 https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/pwm
13 - compatible: Should be "sifive,<chip>-pwm" and "sifive,pwm<version>".
14 Supported compatible strings are: "sifive,fu540-c000-pwm" for the SiFive
15 PWM v0 as integrated onto the SiFive FU540 chip, and "sifive,pwm0" for the
17 Please refer to sifive-blocks-ip-versioning.txt for details.
18 - reg: physical base address and length of the controller's registers
19 - clocks: Should contain a clock identifier for the PWM's parent clock.
20 - #pwm-cells: Should be 3. See pwm.yaml in this directory
22 - interrupts: one interrupt per PWM channel
27 compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
30 interrupt-parent = <&plic>;
32 #pwm-cells = <3>;