Lines Matching +full:pwm +full:- +full:active +full:- +full:state

4 - compatible: Must be:
5   - "nvidia,tegra20-pwm": for Tegra20
6   - "nvidia,tegra30-pwm", "nvidia,tegra20-pwm": for Tegra30
7   - "nvidia,tegra114-pwm", "nvidia,tegra20-pwm": for Tegra114
8   - "nvidia,tegra124-pwm", "nvidia,tegra20-pwm": for Tegra124
9   - "nvidia,tegra132-pwm", "nvidia,tegra20-pwm": for Tegra132
10   - "nvidia,tegra210-pwm", "nvidia,tegra20-pwm": for Tegra210
11   - "nvidia,tegra186-pwm": for Tegra186
12   - "nvidia,tegra194-pwm": for Tegra194
13 - reg: physical base address and length of the controller's registers
14 - #pwm-cells: should be 2. See pwm.yaml in this directory for a description of
16 - clocks: Must contain one entry, for the module clock.
17   See ../clocks/clock-bindings.txt for details.
18 - resets: Must contain an entry for each entry in reset-names.
20 - reset-names: Must include the following entries:
21   - pwm
25 In some of the interface like PWM based regulator device, it is required
27 state of the system. The configuration of pin is provided via the pinctrl
29 	Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
31 The PWM node will have following optional properties.
32 pinctrl-names:	Pin state names. Must be "default" and "sleep".
33 pinctrl-0:	phandle for the default/active state of pin configurations.
34 pinctrl-1:	phandle for the sleep state of pin configurations.
38 	pwm: pwm@7000a000 {
39 		compatible = "nvidia,tegra20-pwm";
41 		#pwm-cells = <2>;
44 		reset-names = "pwm";
51 it requires PWM output to be tristated when system enters suspend.
54 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
72 	pwm@7000a000 {
73 		/* Mandatory PWM properties */
74 		pinctrl-names = "default", "sleep";
75 		pinctrl-0 = <&pwm_active_state>;
76 		pinctrl-1 = <&pwm_sleep_state>;