Lines Matching +full:extts +full:- +full:fifo
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
15 - enum:
16 - fsl,etsec-ptp
17 - fsl,fman-ptp-timer
18 - fsl,dpaa2-ptp
19 - items:
20 - const: pci1957,ee02
21 - const: fsl,enetc-ptp
43 <0> - external high precision timer reference clock (TSEC_TMR_CLK
45 <1> - eTSEC system clock;
46 <2> - eTSEC1 transmit clock;
47 <3> - RTC clock input.
50 <0> - external high precision timer reference clock (TMR_1588_CLK)
51 <1> - MAC system clock (1/2 FMan clock)
52 <2> - reserved
53 <3> - RTC clock oscillator
55 fsl,tclk-period:
59 fsl,tmr-prsc:
63 fsl,tmr-add:
67 fsl,tmr-fiper1:
71 fsl,tmr-fiper2:
75 fsl,tmr-fiper3:
81 fsl,max-adj:
99 tmr_fiper1 = tmr_prsc * tclk_period * FiperDiv1 - tclk_period
100 max_adj = 1000000000 * (FreqDivRatio - 1.0) - 1
111 fsl,extts-fifo:
115 support for the external trigger stamp FIFO
117 little-endian:
121 support for the external trigger stamp FIFO.
122 IP block is little-endian mode. The default endian mode
123 is big-endian.
126 - compatible
127 - reg
130 - if:
134 const: fsl,enetc-ptp
136 $ref: /schemas/pci/pci-device.yaml
141 - |
142 #include <dt-bindings/interrupt-controller/irq.h>
145 compatible = "fsl,etsec-ptp";
148 interrupt-parent = <&ipic>;
150 fsl,tclk-period = <10>;
151 fsl,tmr-prsc = <100>;
152 fsl,tmr-add = <0x999999a4>;
153 fsl,tmr-fiper1 = <0x3b9ac9f6>;
154 fsl,tmr-fiper2 = <0x00018696>;
155 fsl,max-adj = <659999998>;