Lines Matching +full:- +full:gpio +full:- +full:bank
1 Samsung GPIO and Pin Mux/Config controller
3 Samsung's ARM based SoC's integrates a GPIO and Pin mux/config hardware
6 on-chip controllers onto these pads.
9 - compatible: should be one of the following.
10 - "samsung,s3c2412-pinctrl": for S3C2412-compatible pin-controller,
11 - "samsung,s3c2416-pinctrl": for S3C2416-compatible pin-controller,
12 - "samsung,s3c2440-pinctrl": for S3C2440-compatible pin-controller,
13 - "samsung,s3c2450-pinctrl": for S3C2450-compatible pin-controller,
14 - "samsung,s3c64xx-pinctrl": for S3C64xx-compatible pin-controller,
15 - "samsung,s5pv210-pinctrl": for S5PV210-compatible pin-controller,
16 - "samsung,exynos3250-pinctrl": for Exynos3250 compatible pin-controller.
17 - "samsung,exynos4210-pinctrl": for Exynos4210 compatible pin-controller.
18 - "samsung,exynos4x12-pinctrl": for Exynos4x12 compatible pin-controller.
19 - "samsung,exynos5250-pinctrl": for Exynos5250 compatible pin-controller.
20 - "samsung,exynos5260-pinctrl": for Exynos5260 compatible pin-controller.
21 - "samsung,exynos5410-pinctrl": for Exynos5410 compatible pin-controller.
22 - "samsung,exynos5420-pinctrl": for Exynos5420 compatible pin-controller.
23 - "samsung,exynos5433-pinctrl": for Exynos5433 compatible pin-controller.
24 - "samsung,exynos7-pinctrl": for Exynos7 compatible pin-controller.
25 - "samsung,exynos7885-pinctrl": for Exynos7885 compatible pin-controller.
26 - "samsung,exynos850-pinctrl": for Exynos850 compatible pin-controller.
27 - "samsung,exynosautov9-pinctrl": for ExynosAutov9 compatible pin-controller.
29 - reg: Base address of the pin controller hardware module and length of
32 - reg: Second base address of the pin controller if the specific registers
35 Eg: GPF[1-5] of Exynos5433 are separated into the two base address.
36 - First base address is for GPAx and GPF[1-5] external interrupt
38 - Second base address is for GPF[1-5] pinctrl registers.
41 compatible = "samsung,exynos5433-pinctrl";
44 wakeup-interrupt-controller {
45 compatible = "samsung,exynos7-wakeup-eint";
50 - Pin banks as child nodes: Pin banks of the controller are represented by child
51 nodes of the controller node. Bank name is taken from name of the node. Each
52 bank node must contain following properties:
54 - gpio-controller: identifies the node as a gpio controller and pin bank.
55 - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
57 mentioned gpio binding representation for description of particular cells.
60 <[phandle of the gpio controller node]
61 [pin number within the gpio controller]
64 Values for gpio specifier:
65 - Pin number: is a value between 0 to 7.
66 - Flags: 0 - Active High
67 1 - Active Low
69 - Pin mux/config groups as child nodes: The pin mux (selecting pin function
71 as child nodes of the pin-controller node. There should be at least one
84 an example, the pins in GPA0 bank of the pin controller can be represented
85 as "gpa0-0", "gpa0-1", "gpa0-2" and so on. The names should be in lower case.
87 "[pin bank name]-[pin number within the bank]".
90 child node is specified using the "samsung,pin-function" property. The value
95 node. The value of this property is used as-is to program the pin-controller
96 function selector register of the pin-bank.
103 - samsung,pin-val: Initial value of pin output buffer.
104 - samsung,pin-pud: Pull up/down configuration.
105 - samsung,pin-drv: Drive strength configuration.
106 - samsung,pin-pud-pdn: Pull up/down configuration in power down mode.
107 - samsung,pin-drv-pdn: Drive strength configuration in power down mode.
110 hardware manual and these values are programmed as-is into the pin
111 pull up/down and driver strength register of the pin-controller.
117 pin configuration should use the bindings listed in the "pinctrl-bindings.txt"
120 External GPIO and Wakeup Interrupts:
122 The controller supports two types of external interrupts over gpio. The first
123 is the external gpio interrupt and second is the external wakeup interrupts.
127 A. External GPIO Interrupts: For supporting external gpio interrupts, the
128 following properties should be specified in the pin-controller device node.
130 - interrupts: interrupt specifier for the controller. The format and value of
133 In addition, following properties must be present in node of every bank
134 of pins supporting GPIO interrupts:
136 - interrupt-controller: identifies the controller node as interrupt-parent.
137 - #interrupt-cells: the value of this property should be 2.
138 - First Cell: represents the external gpio interrupt number local to the
139 external gpio interrupt space of the controller.
140 - Second Cell: flags to identify the type of the interrupt
141 - 1 = rising edge triggered
142 - 2 = falling edge triggered
143 - 3 = rising and falling edge triggered
144 - 4 = high level triggered
145 - 8 = low level triggered
149 included in the pin-controller device node.
151 Only one pin-controller device node can include external wakeup interrupts
153 pin-controller is supported).
157 - compatible: identifies the type of the external wakeup interrupt controller
159 - samsung,s3c2410-wakeup-eint: represents wakeup interrupt controller
161 - samsung,s3c2412-wakeup-eint: represents wakeup interrupt controller
163 - samsung,s3c64xx-wakeup-eint: represents wakeup interrupt controller
165 - samsung,s5pv210-wakeup-eint: represents wakeup interrupt controller
167 - samsung,exynos4210-wakeup-eint: represents wakeup interrupt controller
169 - samsung,exynos7-wakeup-eint: represents wakeup interrupt controller
171 - interrupts: interrupt used by multiplexed wakeup interrupts.
173 In addition, following properties must be present in node of every bank
174 of pins supporting wake-up interrupts:
176 - interrupt-controller: identifies the node as interrupt-parent.
177 - #interrupt-cells: the value of this property should be 2
178 - First Cell: represents the external wakeup interrupt number local to
180 - Second Cell: flags to identify the type of the interrupt
181 - 1 = rising edge triggered
182 - 2 = falling edge triggered
183 - 3 = rising and falling edge triggered
184 - 4 = high level triggered
185 - 8 = low level triggered
187 Node of every bank of pins supporting direct wake-up interrupts (without
190 - interrupts: interrupts of the interrupt parent which are used for external
191 wakeup interrupts from pins of the bank, must contain interrupts for all
192 pins of the bank.
199 Aliases for controllers compatible with "samsung,exynos7-pinctrl":
200 - pinctrl0: pin controller of ALIVE block,
201 - pinctrl1: pin controller of BUS0 block,
202 - pinctrl2: pin controller of NFC block,
203 - pinctrl3: pin controller of TOUCH block,
204 - pinctrl4: pin controller of FF block,
205 - pinctrl5: pin controller of ESE block,
206 - pinctrl6: pin controller of FSYS0 block,
207 - pinctrl7: pin controller of FSYS1 block,
208 - pinctrl8: pin controller of BUS1 block,
209 - pinctrl9: pin controller of AUDIO block,
211 Example: A pin-controller node with pin banks:
214 compatible = "samsung,exynos4210-pinctrl";
220 /* Pin bank without external interrupts */
222 gpio-controller;
223 #gpio-cells = <2>;
228 /* Pin bank with external GPIO or muxed wake-up interrupts */
230 gpio-controller;
231 #gpio-cells = <2>;
233 interrupt-controller;
234 #interrupt-cells = <2>;
239 /* Pin bank with external direct wake-up interrupts */
241 gpio-controller;
242 #gpio-cells = <2>;
244 interrupt-controller;
245 interrupt-parent = <&gic>;
248 #interrupt-cells = <2>;
254 Example 1: A pin-controller node with pin groups.
256 #include <dt-bindings/pinctrl/samsung.h>
259 compatible = "samsung,exynos4210-pinctrl";
265 uart0_data: uart0-data {
266 samsung,pins = "gpa0-0", "gpa0-1";
267 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
268 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
269 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
272 uart0_fctl: uart0-fctl {
273 samsung,pins = "gpa0-2", "gpa0-3";
274 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
275 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
276 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
279 uart1_data: uart1-data {
280 samsung,pins = "gpa0-4", "gpa0-5";
281 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
282 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
283 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
286 uart1_fctl: uart1-fctl {
287 samsung,pins = "gpa0-6", "gpa0-7";
288 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
289 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
290 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
293 i2c2_bus: i2c2-bus {
294 samsung,pins = "gpa0-6", "gpa0-7";
295 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
296 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
297 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
300 sd4_bus8: sd4-bus-width8 {
301 part-1 {
302 samsung,pins = "gpk0-3", "gpk0-4",
303 "gpk0-5", "gpk0-6";
304 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
305 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
306 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
308 part-2 {
309 samsung,pins = "gpk1-3", "gpk1-4",
310 "gpk1-5", "gpk1-6";
311 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
312 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
313 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
318 Example 2: A pin-controller node with external wakeup interrupt controller node.
321 compatible = "samsung,exynos4210-pinctrl";
327 wakeup-interrupt-controller {
328 compatible = "samsung,exynos4210-wakeup-eint";
329 interrupt-parent = <&gic>;
334 Example 3: A uart client node that supports 'default' and 'flow-control' states.
337 compatible = "samsung,exynos4210-uart";
340 pinctrl-names = "default", "flow-control;
341 pinctrl-0 = <&uart0_data>;
342 pinctrl-1 = <&uart0_data>, <&uart0_fctl>;
352 pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
356 and gpio binding.
358 display-port-controller {
361 samsung,hpd-gpio = <&gpx2 6 0>;
362 pinctrl-names = "default";
363 pinctrl-0 = <&dp_hpd>;
366 Example 6: Request the gpio for display port controller
371 struct device *dev = &pdev->dev;
372 struct device_node *dp_node = dev->of_node;
376 hpd_gpio = of_get_named_gpio(dp_node, "samsung,hpd-gpio", 0);
380 ret = devm_gpio_request_one(&pdev->dev, hpd_gpio, GPIOF_IN,