Lines Matching +full:pinctrl +full:-

1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/rockchip,pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Heiko Stuebner <heiko@sntech.de>
18   Please refer to pinctrl-bindings.txt in this directory for details of the
19   common pinctrl bindings used by client devices, including the meaning of the
26   various pad settings such as pull-up, etc.
29   defined as gpio sub-nodes of the pinmux controller.
34       - rockchip,px30-pinctrl
35       - rockchip,rk2928-pinctrl
36       - rockchip,rk3036-pinctrl
37       - rockchip,rk3066a-pinctrl
38       - rockchip,rk3066b-pinctrl
39       - rockchip,rk3128-pinctrl
40       - rockchip,rk3188-pinctrl
41       - rockchip,rk3228-pinctrl
42       - rockchip,rk3288-pinctrl
43       - rockchip,rk3308-pinctrl
44       - rockchip,rk3328-pinctrl
45       - rockchip,rk3368-pinctrl
46       - rockchip,rk3399-pinctrl
47       - rockchip,rk3568-pinctrl
48       - rockchip,rk3588-pinctrl
49       - rockchip,rv1108-pinctrl
50       - rockchip,rv1126-pinctrl
65   "#address-cells":
68   "#size-cells":
74   - $ref: pinctrl.yaml#
77   - compatible
78   - rockchip,grf
81   "gpio@[0-9a-f]+$":
84     $ref: /schemas/gpio/rockchip,gpio-bank.yaml#
89   "pcfg-[a-z0-9-]+$":
92       bias-disable: true
94       bias-pull-down: true
96       bias-pull-pin-default: true
98       bias-pull-up: true
100       drive-strength:
104       input-enable: true
106       input-schmitt-enable: true
108       output-high: true
110       output-low: true
122         $ref: /schemas/types.yaml#/definitions/uint32-matrix
126             - minimum: 0
130             - minimum: 0
134             - minimum: 0
139             - description:
141                 to use as described in pinctrl-bindings.txt.
144   - |
145     #include <dt-bindings/interrupt-controller/arm-gic.h>
146     #include <dt-bindings/pinctrl/rockchip.h>
148     pinctrl: pinctrl {
149       compatible = "rockchip,rk3066a-pinctrl";
152       #address-cells = <1>;
153       #size-cells = <1>;
157         compatible = "rockchip,gpio-bank";
162         gpio-controller;
163         #gpio-cells = <2>;
165         interrupt-controller;
166         #interrupt-cells = <2>;
169       pcfg_pull_default: pcfg-pull-default {
170         bias-pull-pin-default;
174         uart2_xfer: uart2-xfer {
182       compatible = "snps,dw-apb-uart";
186       pinctrl-0 = <&uart2_xfer>;
187       pinctrl-names = "default";
188       reg-io-width = <1>;
189       reg-shift = <2>;