Lines Matching +full:controller +full:- +full:number

1 Renesas RZ/A2 combined Pin and GPIO controller
3 The Renesas SoCs of the RZ/A2 series feature a combined Pin and GPIO controller.
4 Pin multiplexing and GPIO configuration is performed on a per-pin basis.
9 Pin controller node
10 -------------------
13   - compatible: shall be:
14     - "renesas,r7s9210-pinctrl": for RZ/A2M
15   - reg
16     Address base and length of the memory area where the pin controller
18   - gpio-controller
19     This pin controller also controls pins as GPIO
20   - #gpio-cells
22   - gpio-ranges
23     Expresses the total number of GPIO ports/pins in this SoC
25 Example: Pin controller node for RZ/A2M SoC (r7s9210)
27 	pinctrl: pin-controller@fcffe000 {
28 		compatible = "renesas,r7s9210-pinctrl";
31 		gpio-controller;
32 		#gpio-cells = <2>;
33 		gpio-ranges = <&pinctrl 0 0 176>;
36 Sub-nodes
37 ---------
39 The child nodes of the pin controller designate pins to be used for
42 - Pin multiplexing sub-nodes:
43   A pin multiplexing sub-node describes how to configure a set of
46   number and the desired function index. Use the RZA2_PINMUX macro located
47   in include/dt-bindings/pinctrl/r7s9210-pinctrl.h to easily define these.
48   For assigning GPIO pins, use the macro RZA2_PIN also in r7s9210-pinctrl.h
52     - pinmux:
53       integer array representing pin number and pin multiplexing configuration.
56       alternate function configuration number along with it.
61       (port where it sits on and pin number) and alternate function identifier
62       are provided by the pin controller header file at:
63       <dt-bindings/pinctrl/r7s9210-pinctrl.h>
81 		compatible = "gpio-leds";