Lines Matching +full:software +full:- +full:controlled
5 Pin multiplexing and GPIO configuration is performed on a per-pin basis
6 writing configuration values to per-port register sets.
12 -------------------
15 - compatible: should be:
16 - "renesas,r7s72100-ports": for RZ/A1H
17 - "renesas,r7s72101-ports", "renesas,r7s72100-ports": for RZ/A1M
18 - "renesas,r7s72102-ports": for RZ/A1L
20 - reg
27 pinctrl: pin-controller@fcfe3000 {
28 compatible = "renesas,r7s72100-ports";
33 Sub-nodes
34 ---------
39 - Pin multiplexing sub-nodes:
40 A pin multiplexing sub-node describes how to configure a set of
42 A single sub-node may define several pin configurations.
46 "software IO driven" mode to be specified. To do so use the generic
50 Please refer to pinctrl-bindings.txt to get to know more on generic
53 The allowed generic formats for a pin multiplexing sub-node are the
56 node-1 {
61 node-2 {
62 sub-node-1 {
67 sub-node-2 {
74 sub-node-n {
83 Client sub-nodes shall refer to pin multiplexing sub-nodes using the phandle
88 client-1 {
90 pinctrl-0 = <&node-1>;
94 client-2 {
96 pinctrl-0 = <&node-2>;
101 - pinmux:
112 <include/dt-bindings/pinctrl/r7s72100-pinctrl.h>
117 - input-enable:
118 enable input bufer for pins requiring software driven IO input
120 - output-high:
121 enable output buffer for pins requiring software driven IO output
122 operations. output-low can be used alternatively, as line value is
126 work in bi-directional mode and when the IO direction has to be specified
127 by software. Bi-directional pins are managed by the pin controller driver
128 internally, while software driven IO direction has to be explicitly
144 I2c master: both SDA and SCL pins need bi-directional operations
154 Both need to work in bi-directional mode, the driver manages this internally.
157 Multi-function timer input and output compare pins.
158 Configure TIOC0A as software driven input and TIOC0B as software driven
165 input-enable;
170 output-enable;
177 pinctrl-0 = <&tioc0_pins>;
182 specified by software as input.
184 specified by software as output.
186 - GPIO controller sub-nodes:
191 Describe GPIO controllers using sub-nodes with the following properties.
194 - gpio-controller
196 - #gpio-cells
199 - gpio-ranges
201 base in the global pin numbering space, and the number of controlled
209 pins [0 - 15] on this controller map to pins [48 - 63] in the global pin
212 port3: gpio-3 {
213 gpio-controller;
214 #gpio-cells = <2>;
215 gpio-ranges = <&pinctrl 0 48 16>;
218 A device node willing to use pins controlled by this GPIO controller, shall