Lines Matching +full:msm8916 +full:- +full:pinctrl
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8916-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm MSM8916 TLMM pin controller
10 - Bjorn Andersson <andersson@kernel.org>
11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
14 Top Level Mode Multiplexer pin controller in Qualcomm MSM8916 SoC.
18 const: qcom,msm8916-pinctrl
26 gpio-reserved-ranges:
30 gpio-line-names:
34 "-state$":
36 - $ref: "#/$defs/qcom-msm8916-tlmm-state"
37 - patternProperties:
38 "-pins$":
39 $ref: "#/$defs/qcom-msm8916-tlmm-state"
43 qcom-msm8916-tlmm-state:
46 Pinctrl node's client devices use subnodes for desired pin configuration.
48 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
58 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-9]|12[01])$"
59 - enum: [ qdsd_clk, qdsd_cmd, qdsd_data0, qdsd_data1, qdsd_data2,
101 - pins
104 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
107 - compatible
108 - reg
113 - |
114 #include <dt-bindings/interrupt-controller/arm-gic.h>
116 msmgpio: pinctrl@1000000 {
117 compatible = "qcom,msm8916-pinctrl";
120 gpio-controller;
121 gpio-ranges = <&msmgpio 0 0 122>;
122 #gpio-cells = <2>;
123 interrupt-controller;
124 #interrupt-cells = <2>;
126 blsp1-uart2-sleep-state {
130 drive-strength = <2>;
131 bias-pull-down;
134 spi1-default-state {
135 spi-pins {
139 drive-strength = <12>;
140 bias-disable;
143 cs-pins {
147 drive-strength = <16>;
148 bias-disable;
149 output-high;