Lines Matching +full:mdc +full:- +full:pin
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,ipq5018-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm IPQ5018 TLMM pin controller
10 - Bjorn Andersson <andersson@kernel.org>
11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
14 Top Level Mode Multiplexer pin controller in Qualcomm IPQ5018 SoC.
18 const: qcom,ipq5018-tlmm
26 gpio-reserved-ranges:
30 gpio-line-names:
34 "-state$":
36 - $ref: "#/$defs/qcom-ipq5018-tlmm-state"
37 - patternProperties:
38 "-pins$":
39 $ref: "#/$defs/qcom-ipq5018-tlmm-state"
43 qcom-ipq5018-tlmm-state:
46 Pinctrl node's client devices use subnodes for desired pin configuration.
48 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
57 pattern: "^gpio([0-9]|[1-3][0-9]|4[0-6])$"
73 gcc_plltest, gcc_tlmm, gpio, led0, led2, mac0, mac1, mdc, mdio,
85 - pins
88 - compatible
89 - reg
92 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
97 - |
98 #include <dt-bindings/interrupt-controller/arm-gic.h>
100 compatible = "qcom,ipq5018-tlmm";
102 gpio-controller;
103 #gpio-cells = <2>;
104 gpio-ranges = <&tlmm 0 0 47>;
105 interrupt-controller;
106 #interrupt-cells = <2>;
109 uart-w-state {
110 rx-pins {
113 bias-pull-down;
116 tx-pins {
119 bias-pull-down;