Lines Matching +full:mdc +full:- +full:pin

7 - compatible: "qcom,ipq4019-pinctrl"
8 - reg: Should be the base address and length of the TLMM block.
9 - interrupts: Should be the parent IRQ of the TLMM block.
10 - interrupt-controller: Marks the device node as an interrupt controller.
11 - #interrupt-cells: Should be two.
12 - gpio-controller: Marks the device node as a GPIO controller.
13 - #gpio-cells : Should be two.
14                 The first cell is the gpio pin number and the
16 - gpio-ranges: see ../gpio/gpio.txt
20 - gpio-reserved-ranges: see ../gpio/gpio.txt
22 Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
25 Please refer to pinctrl-bindings.txt in this directory for details of the
27 phrase "pin configuration node".
29 The pin configuration nodes act as a container for an arbitrary number of
31 pin, a group, or a list of pins or groups. This configuration can include the
32 mux function to select on those pin(s)/group(s), and various pin configuration
33 parameters, such as pull-up, drive strength, etc.
39 other words, a subnode that lists a mux function but no pin configuration
40 parameters implies no information about any pin configuration parameters.
41 Similarly, a pin subnode that describes a pullup parameter implies no
45 The following generic properties as defined in pinctrl-bindings.txt are valid
46 to specify in a pin configuration subnode:
47  pins, function, bias-disable, bias-pull-down, bias-pull-up, drive-open-drain,
48  drive-strength.
50 Non-empty subnodes must specify the 'pins' property.
55   gpio0-gpio99
56     Supports mux, bias and drive-strength
62 mdc, mdio, pcie, pmu, prng_rosc, qpic, rgmii, rmii, sdio, smart0, smart1,
68 		compatible = "qcom,ipq4019-pinctrl";
71 		gpio-controller;
72 		#gpio-cells = <2>;
73 		gpio-ranges = <&tlmm 0 0 100>;
74 		interrupt-controller;
75 		#interrupt-cells = <2>;
82 				bias-disable;