Lines Matching +full:input +full:- +full:value
1 One-register-per-pin type device tree based pinctrl driver
4 - compatible : "pinctrl-single" or "pinconf-single".
5 "pinctrl-single" means that pinconf isn't supported.
6 "pinconf-single" means that generic pinconf is supported.
8 - reg : offset and length of the register set for the mux registers
10 - #pinctrl-cells : number of cells in addition to the index, set to 1
11 or 2 for pinctrl-single,pins and set to 2 for pinctrl-single,bits
13 - pinctrl-single,register-width : pinmux register access width in bits
15 - pinctrl-single,function-mask : mask of allowed pinmux function bits
19 - pinctrl-single,function-off : function off mode for disabled state if
23 - pinctrl-single,bit-per-mux : boolean to indicate that one register controls
24 more than one pin, for which "pinctrl-single,function-mask" property specifies
27 - pinctrl-single,drive-strength : array of value that are used to configure
28 drive strength in the pinmux register. They're value of drive strength
32 pinctrl-single,power-source = <0x30 0xf0>;
34 - pinctrl-single,bias-pullup : array of value that are used to configure the
35 input bias pullup in the pinmux register.
37 /* input, enabled pullup bits, disabled pullup bits, mask */
38 pinctrl-single,bias-pullup = <0 1 0 1>;
40 - pinctrl-single,bias-pulldown : array of value that are used to configure the
41 input bias pulldown in the pinmux register.
43 /* input, enabled pulldown bits, disabled pulldown bits, mask */
44 pinctrl-single,bias-pulldown = <2 2 0 2>;
46 * Two bits to control input bias pullup and pulldown: User should use
47 pinctrl-single,bias-pullup & pinctrl-single,bias-pulldown. One bit means
49 * Three bits to control input bias enable, pullup and pulldown. User should
50 use pinctrl-single,bias-pullup & pinctrl-single,bias-pulldown. Input bias
53 pinctrl-single,bias-disable. Because pinctrl single driver could implement
56 - pinctrl-single,input-schmitt : array of value that are used to configure
57 input schmitt in the pinmux register. In some silicons, there're two input
58 schmitt value (rising-edge & falling-edge) in the pinmux register.
60 /* input schmitt value, mask */
61 pinctrl-single,input-schmitt = <0x30 0x70>;
63 - pinctrl-single,input-schmitt-enable : array of value that are used to
64 configure input schmitt enable or disable in the pinmux register.
66 /* input, enable bits, disable bits, mask */
67 pinctrl-single,input-schmitt-enable = <0x30 0x40 0 0x70>;
69 - pinctrl-single,low-power-mode : array of value that are used to configure
73 /* low power mode value, mask */
74 pinctrl-single,low-power-mode = <0x288 0x388>;
76 - pinctrl-single,gpio-range : list of value that are used to configure a GPIO
77 range. They're value of subnode phandle, pin base in pinctrl device, pin
78 number in this range, GPIO function value of this GPIO range.
79 The number of parameters is depend on #pinctrl-single,gpio-range-cells
83 pinctrl-single,gpio-range = <&range 0 3 0>, <&range 3 9 1>;
85 - interrupt-controller : standard interrupt controller binding if using
86 interrupts for wake-up events for example. In this case pinctrl-single
87 is set up as a chained interrupt controller and the wake-up interrupts
90 - #interrupt-cells : standard interrupt binding if using interrupts
93 pinctrl-single,bit-per-mux is set), and uses the common pinctrl bindings as
94 specified in the pinctrl-bindings.txt document in this directory.
96 The pin configuration nodes for pinctrl-single are specified as pinctrl
97 register offset and values using pinctrl-single,pins. Only the bits specified
98 in pinctrl-single,function-mask are updated.
100 When #pinctrl-cells = 1, then setting a pin for a device could be done with:
102 pinctrl-single,pins = <0xdc 0x118>;
105 pinctrl register, and 0x118 contains the desired value of the pinctrl register.
107 When #pinctrl-cells = 2, then setting a pin for a device could be done with:
109 pinctrl-single,pins = <0xdc 0x30 0x07>;
111 Where 0x30 is the pin configuration value and 0x07 is the pin mux mode value.
112 These two values are OR'd together to produce the value stored at offset 0xdc.
116 pinctrl-single,bits need to be used which takes three parameters:
118 pinctrl-single,bits = <0xdc 0x18 0xff>;
121 device pinctrl register, 0x18 is the desired value, and 0xff is the sub mask to
125 Optional sub-node: In case some pins could be configured as GPIO in the pinmux
126 register, those pins could be defined as a GPIO range. This sub-node is required
127 by pinctrl-single,gpio-range property.
129 Required properties in sub-node:
130 - #pinctrl-single,gpio-range-cells : the number of parameters after phandle in
131 pinctrl-single,gpio-range property.
133 range: gpio-range {
134 #pinctrl-single,gpio-range-cells = <3>;
144 compatible = "pinctrl-single";
146 #address-cells = <1>;
147 #size-cells = <0>;
148 #interrupt-cells = <1>;
149 interrupt-controller;
150 pinctrl-single,register-width = <16>;
151 pinctrl-single,function-mask = <0xffff>;
156 compatible = "pinctrl-single";
158 #address-cells = <1>;
159 #size-cells = <0>;
160 #interrupt-cells = <1>;
161 interrupt-controller;
162 pinctrl-single,register-width = <16>;
163 pinctrl-single,function-mask = <0xffff>;
167 compatible = "pinctrl-single";
169 #address-cells = <1>;
170 #size-cells = <0>;
171 pinctrl-single,bit-per-mux;
172 pinctrl-single,register-width = <32>;
173 pinctrl-single,function-mask = <0x5F>;
178 compatible = "pinconf-single";
180 #address-cells = <1>;
181 #size-cells = <1>;
184 pinctrl-single,register-width = <32>;
185 pinctrl-single,function-mask = <7>;
188 pinctrl-single,gpio-range = <&range 0 3 0>, <&range 3 9 1>,
193 range: gpio-range {
194 #pinctrl-single,gpio-range-cells = <3>;
207 pinctrl-names = "default";
208 pinctrl-0 = <&board_pins>;
211 pinctrl-single,pins = <
220 pinctrl-single,pins = <
224 pinctrl-single,bias-pulldown = <0 2 2>;
225 pinctrl-single,bias-pullup = <0 1 1>;
230 pinctrl-single,pins = <
241 pinctrl-single,bits = <
247 pinctrl-single,bits = <
255 pinctrl-names = "default";
256 pinctrl-0 = <&uart0_pins>;
260 pinctrl-names = "default";
261 pinctrl-0 = <&uart2_pins>;