Lines Matching +full:spi +full:- +full:pins
4 - compatible: Should be one of the following
5 "mediatek,mt7622-pinctrl" for MT7622 SoC
6 "mediatek,mt7629-pinctrl" for MT7629 SoC
7 - reg: offset and length of the pinctrl space
9 - gpio-controller: Marks the device node as a GPIO controller.
10 - #gpio-cells: Should be two. The first cell is the pin number and the
14 - interrupt-controller : Marks the device node as an interrupt controller
16 If the property interrupt-controller is defined, following property is required
17 - reg-names: A string describing the "reg" entries. Must contain "eint".
18 - interrupts : The interrupt output from the controller.
19 - #interrupt-cells: Should be two.
21 Please refer to pinctrl-bindings.txt in this directory for details of the
27 pin, a group, or a list of pins or groups. This configuration can include the
29 parameters, such as pull-up, slew rate, etc.
40 The following generic properties as defined in pinctrl-bindings.txt are valid
44 - groups: An array of strings. Each string contains the name of a group.
46 - function: A string containing the name of the function to mux to the
51 The following generic properties as defined in pinctrl-bindings.txt are valid
55 - pins: An array of strings. Each string contains the name of a pin.
57 - groups: An array of strings. Each string contains the name of a group.
61 bias-disable, bias-pull, bias-pull-down, input-enable,
62 input-schmitt-enable, input-schmitt-disable, output-enable
63 output-low, output-high, drive-strength, slew-rate
65 Valid arguments for 'slew-rate' are '0' for no slew rate controlled and '1' for
67 Valid arguments for 'drive-strength', 4, 8, 12, or 16 in mA.
73 - mediatek,tdsel: An integer describing the steps for output level shifter duty
76 - mediatek,rdsel: An integer describing the steps for input level shifter duty
80 == Valid values for pins, function and groups on MT7622 ==
82 Valid values for pins are:
83 pins can be referenced via the pin names as the below table shown and the
85 references to pins between groups to know whether pins assignment conflict
86 happens among devices try to acquire those available pins.
88 Pin #: Valid values for pins
89 -----------------------------
196 "pmic", "pwm", "sd", "spi", "tdm", "uart", "watchdog"
200 applicable function and which relevant pins (in pin#) are able applied for that
203 Valid value function pins (in pin#)
204 -------------------------------------------------------------------------
292 "spic0_0" "spi" 63, 64, 65, 66
293 "spic0_1" "spi" 79, 80, 81, 82
294 "spic1_0" "spi" 67, 68, 69, 70
295 "spic1_1" "spi" 73, 74, 75, 76
296 "spic2_0_wp_hold" "spi" 8, 9
297 "spic2_0" "spi" 10, 11, 12, 13
329 == Valid values for pins, function and groups on MT7629 ==
331 Pin #: Valid values for pins
332 -----------------------------
414 "eth", "i2c", "led", "flash", "pcie", "pwm", "spi", "uart",
418 Valid value function pins (in pin#)
419 ----------------------------------------------------------------
439 "spi_0" "spi" 21, 22, 23, 24
440 "spi_1" "spi" 62, 63, 64, 65
441 "spi_wp" "spi" 66
442 "spi_hold" "spi" 67
461 compatible = "mediatek,mt7622-pinctrl";
463 gpio-controller;
464 #gpio-cells = <2>;
466 pinctrl_eth_default: eth-default {
467 mux-mdio {
470 drive-strength = <12>;
473 mux-gmac2 {
476 drive-strength = <12>;
479 mux-esw {
482 drive-strength = <8>;
485 conf-mdio {
486 pins = "MDC";
487 bias-pull-up;