Lines Matching +full:tegra20 +full:- +full:hdmi
3 The Tegra30 pinctrl binding is very similar to the Tegra20 pinctrl binding,
4 as described in nvidia,tegra20-pinmux.txt. In fact, this document assumes
9 - compatible: "nvidia,tegra30-pinmux"
10 - reg: Should contain the register physical address and length for each of
14 - nvidia,enable-input: Integer. Enable the pin's input path. 0: no, 1: yes.
15 - nvidia,open-drain: Integer. Enable open drain mode. 0: no, 1: yes.
16 - nvidia,lock: Integer. Lock the pin configuration against further changes
18 - nvidia,io-reset: Integer. Reset the IO path. 0: no, 1: yes.
20 As with Tegra20, see the Tegra TRM for complete details regarding which groups
25 per-pin mux groups:
28 nvidia,enable-input, nvidia,lock. Some support nvidia,open-drain,
29 nvidia,io-reset.
85 These all support nvidia,pull-down-strength, nvidia,pull-up-strength,
86 nvidia,slew-rate-rising, nvidia,slew-rate-falling. Most but not all
87 support nvidia,high-speed-mode, nvidia,schmitt, nvidia,low-power-mode.
98 extperiph3, gmi, gmi_alt, hda, hdcp, hdmi, hsi, i2c1, i2c2, i2c3,
109 compatible = "nvidia,tegra30-pinmux";
142 pinctrl-names = "default";
143 pinctrl-0 = <&sdmmc4_default>;