Lines Matching +full:miso +full:- +full:pins
3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6710-pinctrl"
8 - reg: register specifier of MPP registers
10 Available mpp pins/groups and functions:
14 name pins functions
20 mpp4 4 gpio, vdd(cpu-pd)
35 mpp15 15 gpio, ge0(rxctl), pcie(clkreq1), sd0(d3), spi1(miso),
47 mpp26 26 gpio, ge0(crs), ge1(rxd1), spi1(miso)
57 mpp36 36 gpo, dev(a1), spi0(miso)
73 mpp50 50 gpio, dev(ad11), uart0(cts), sd0(d1), spi1(miso),
95 mpp64 64 gpio, spi0(miso), spi0(cs1)
99 one example of a gpio usage on the board D-Link DNS-327L