Lines Matching +full:a +full:- +full:gpio
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 Please refer to pinctrl-bindings.txt in this directory for details of the
14 For the Ingenic SoCs, pin control is tightly bound with GPIO ports. All pins
16 GPIO port configuration registers and it is typical to refer to pins using the
17 naming scheme "PxN" where x is a character identifying the GPIO port with
19 pin within that GPIO port. For example PA0 is the first pin in GPIO port A,
20 and PB31 is the last pin in GPIO port B. The JZ4730, the JZ4740, the JZ4725B,
21 the X1000 and the X1830 contains 4 GPIO ports, PA to PD, for a total of 128
22 pins. The X2000 and the X2100 contains 5 GPIO ports, PA to PE, for a total of
24 6 GPIO ports, PA to PF, for a total of 192 pins. The JZ4775 contains 7 GPIO
25 ports, PA to PG, for a total of 224 pins.
28 - Paul Cercueil <paul@crapouillou.net>
33 - enum:
34 - ingenic,jz4730-pinctrl
35 - ingenic,jz4740-pinctrl
36 - ingenic,jz4725b-pinctrl
37 - ingenic,jz4750-pinctrl
38 - ingenic,jz4755-pinctrl
39 - ingenic,jz4760-pinctrl
40 - ingenic,jz4770-pinctrl
41 - ingenic,jz4775-pinctrl
42 - ingenic,jz4780-pinctrl
43 - ingenic,x1000-pinctrl
44 - ingenic,x1500-pinctrl
45 - ingenic,x1830-pinctrl
46 - ingenic,x2000-pinctrl
47 - ingenic,x2100-pinctrl
48 - items:
49 - const: ingenic,jz4760b-pinctrl
50 - const: ingenic,jz4760-pinctrl
51 - items:
52 - const: ingenic,x1000e-pinctrl
53 - const: ingenic,x1000-pinctrl
54 - items:
55 - const: ingenic,x2000e-pinctrl
56 - const: ingenic,x2000-pinctrl
61 "#address-cells":
64 "#size-cells":
68 "^gpio@[0-9]$":
73 - ingenic,jz4730-gpio
74 - ingenic,jz4740-gpio
75 - ingenic,jz4725b-gpio
76 - ingenic,jz4750-gpio
77 - ingenic,jz4755-gpio
78 - ingenic,jz4760-gpio
79 - ingenic,jz4770-gpio
80 - ingenic,jz4775-gpio
81 - ingenic,jz4780-gpio
82 - ingenic,x1000-gpio
83 - ingenic,x1500-gpio
84 - ingenic,x1830-gpio
85 - ingenic,x2000-gpio
86 - ingenic,x2100-gpio
90 - description: The GPIO bank number
92 gpio-controller: true
94 "#gpio-cells":
97 gpio-ranges:
100 interrupt-controller: true
102 "#interrupt-cells":
105 Refer to ../interrupt-controller/interrupts.txt for more details.
111 - compatible
112 - reg
113 - gpio-controller
114 - "#gpio-cells"
115 - interrupts
116 - interrupt-controller
117 - "#interrupt-cells"
122 - $ref: pinctrl.yaml#
125 - compatible
126 - reg
127 - "#address-cells"
128 - "#size-cells"
132 - type: object
134 - $ref: pincfg-node.yaml#
135 - $ref: pinmux-node.yaml#
141 bias-disable: true
142 bias-pull-up: true
143 bias-pull-down: true
144 output-low: true
145 output-high: true
148 - type: object
152 - $ref: pincfg-node.yaml#
153 - $ref: pinmux-node.yaml#
159 bias-disable: true
160 bias-pull-up: true
161 bias-pull-down: true
162 output-low: true
163 output-high: true
167 - |
169 compatible = "ingenic,jz4770-pinctrl";
172 #address-cells = <1>;
173 #size-cells = <0>;
175 gpio@0 {
176 compatible = "ingenic,jz4770-gpio";
179 gpio-controller;
180 gpio-ranges = <&pinctrl 0 0 32>;
181 #gpio-cells = <2>;
183 interrupt-controller;
184 #interrupt-cells = <2>;
186 interrupt-parent = <&intc>;