Lines Matching +full:default +full:- +full:trim
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Wesley Cheng <quic_wcheng@quicinc.com>
19 - items:
20 - enum:
21 - qcom,ipq6018-qusb2-phy
22 - qcom,ipq8074-qusb2-phy
23 - qcom,ipq9574-qusb2-phy
24 - qcom,msm8953-qusb2-phy
25 - qcom,msm8996-qusb2-phy
26 - qcom,msm8998-qusb2-phy
27 - qcom,qcm2290-qusb2-phy
28 - qcom,sdm660-qusb2-phy
29 - qcom,sm4250-qusb2-phy
30 - qcom,sm6115-qusb2-phy
31 - items:
32 - enum:
33 - qcom,sc7180-qusb2-phy
34 - qcom,sdm670-qusb2-phy
35 - qcom,sdm845-qusb2-phy
36 - qcom,sm6350-qusb2-phy
37 - const: qcom,qusb2-v2-phy
41 "#phy-cells":
47 - description: phy config clock
48 - description: 19.2 MHz ref clk
49 - description: phy interface clock (Optional)
51 clock-names:
54 - const: cfg_ahb
55 - const: ref
56 - const: iface
58 vdd-supply:
62 vdda-pll-supply:
66 vdda-phy-dpdm-supply:
75 nvmem-cells:
78 Phandle to nvmem cell that contains 'HS Tx trim'
81 qcom,tcsr-syscon:
86 qcom,imp-res-offset-value:
94 default: 0
96 qcom,bias-ctrl-value:
98 It is a 6 bit value that specifies bias-ctrl-value. It is a PHY
103 default: 32
105 qcom,charge-ctrl-value:
107 It is a 2 bit value that specifies charge-ctrl-value. It is a PHY
112 default: 0
114 qcom,hstx-trim-value:
118 Possible range is - 15mA to 24mA (stepsize of 600 uA).
119 See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
123 default: 3
125 qcom,preemphasis-level:
127 It is a 2 bit value that specifies pre-emphasis level.
129 See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
133 default: 2
135 qcom,preemphasis-width:
138 pre-emphasis (specified using qcom,preemphasis-level) must be in
139 effect. Duration could be half-bit of full-bit.
140 See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
144 default: 0
146 qcom,hsdisc-trim-value:
153 default: 0
156 - compatible
157 - reg
158 - "#phy-cells"
159 - clocks
160 - clock-names
161 - vdd-supply
162 - vdda-pll-supply
163 - vdda-phy-dpdm-supply
164 - resets
167 - if:
172 const: qcom,qusb2-v2-phy
175 qcom,imp-res-offset-value: false
176 qcom,bias-ctrl-value: false
177 qcom,charge-ctrl-value: false
178 qcom,hstx-trim-value: false
179 qcom,preemphasis-level: false
180 qcom,preemphasis-width: false
181 qcom,hsdisc-trim-value: false
186 - |
187 #include <dt-bindings/clock/qcom,gcc-msm8996.h>
189 compatible = "qcom,msm8996-qusb2-phy";
191 #phy-cells = <0>;
195 clock-names = "cfg_ahb", "ref";
197 vdd-supply = <&pm8994_l28>;
198 vdda-pll-supply = <&pm8994_l12>;
199 vdda-phy-dpdm-supply = <&pm8994_l24>;
202 nvmem-cells = <&qusb2p_hstx_trim>;