Lines Matching +full:phy +full:- +full:ref +full:- +full:clk
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/phy/qcom,qmp-usb3-dp-phy.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Qualcomm QMP USB3 DP PHY controller
11 - Wesley Cheng <quic_wcheng@quicinc.com>
16 - qcom,sc7180-qmp-usb3-dp-phy
17 - qcom,sc7280-qmp-usb3-dp-phy
18 - qcom,sc8180x-qmp-usb3-dp-phy
19 - qcom,sc8280xp-qmp-usb43dp-phy
20 - qcom,sdm845-qmp-usb3-dp-phy
21 - qcom,sm8250-qmp-usb3-dp-phy
24 - description: Address and length of PHY's USB serdes block.
25 - description: Address and length of the DP_COM control block.
26 - description: Address and length of PHY's DP serdes block.
28 reg-names:
30 - const: usb
31 - const: dp_com
32 - const: dp
34 "#address-cells":
37 "#size-cells":
44 - description: Phy aux clock.
45 - description: Phy config clock.
46 - description: 19.2 MHz ref clk.
47 - description: Phy common block aux clock.
49 clock-names:
51 - const: aux
52 - const: cfg_ahb
53 - const: ref
54 - const: com_aux
56 power-domains:
61 - description: reset of phy block.
62 - description: phy common block reset.
64 reset-names:
66 - const: phy
67 - const: common
69 vdda-phy-supply:
71 Phandle to a regulator supply to PHY core block.
73 vdda-pll-supply:
75 Phandle to 1.8V regulator supply to PHY refclk pll block.
77 vddp-ref-clk-supply:
83 "^usb3-phy@[0-9a-f]+$":
87 The USB3 PHY.
92 - description: Address and length of TX.
93 - description: Address and length of RX.
94 - description: Address and length of PCS.
95 - description: Address and length of TX2.
96 - description: Address and length of RX2.
97 - description: Address and length of pcs_misc.
101 - description: pipe clock
103 clock-names:
106 - const: pipe0
108 clock-output-names:
110 - const: usb3_phy_pipe_clk_src
112 '#clock-cells':
115 '#phy-cells':
119 - reg
120 - clocks
121 - '#clock-cells'
122 - '#phy-cells'
124 "^dp-phy@[0-9a-f]+$":
128 The DP PHY.
133 - description: Address and length of TX.
134 - description: Address and length of RX.
135 - description: Address and length of PCS.
136 - description: Address and length of TX2.
137 - description: Address and length of RX2.
139 '#clock-cells':
142 '#phy-cells':
146 - reg
147 - '#clock-cells'
148 - '#phy-cells'
151 - compatible
152 - reg
153 - "#address-cells"
154 - "#size-cells"
155 - ranges
156 - clocks
157 - clock-names
158 - resets
159 - reset-names
160 - vdda-phy-supply
161 - vdda-pll-supply
166 - if:
171 - qcom,sc8280xp-qmp-usb43dp-phy
174 - power-domains
177 - |
178 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
179 usb_1_qmpphy: phy-wrapper@88e9000 {
180 compatible = "qcom,sdm845-qmp-usb3-dp-phy";
184 reg-names = "usb", "dp_com", "dp";
185 #address-cells = <1>;
186 #size-cells = <1>;
193 clock-names = "aux", "cfg_ahb", "ref", "com_aux";
197 reset-names = "phy", "common";
199 vdda-phy-supply = <&vdda_usb2_ss_1p2>;
200 vdda-pll-supply = <&vdda_usb2_ss_core>;
202 usb3-phy@200 {
209 #clock-cells = <0>;
210 #phy-cells = <0>;
212 clock-output-names = "usb3_phy_pipe_clk_src";
215 dp-phy@88ea200 {
221 #clock-cells = <1>;
222 #phy-cells = <0>;