Lines Matching full:description

13 description:
67       - description: Address and length of PHY's common serdes block.
68       - description: Address and length of PHY's DP_COM control block.
98     description:
102     description:
106     description:
113     description:
142             - description: Phy aux clock.
143             - description: Phy config clock.
144             - description: 19.2 MHz ref clk.
145             - description: Phy common block aux clock.
154             - description: reset of phy block.
155             - description: phy common block reset.
174             - description: Phy aux clock.
175             - description: Phy config clock.
176             - description: 19.2 MHz ref clk.
184             - description: reset of phy block.
185             - description: phy common block reset.
203             - description: Phy aux clock.
204             - description: Phy config clock.
205             - description: 19.2 MHz ref clk.
213             - description: reset of phy block.
214             - description: phy common block reset.
215             - description: phy's ahb cfg block reset.
237             - description: Phy aux clock.
238             - description: Phy config clock.
239             - description: 19.2 MHz ref clk.
247             - description: reset of phy block.
248             - description: phy common block reset.
266             - description: 19.2 MHz ref clk.
272             - description: PHY reset in the UFS controller.
295             - description: 19.2 MHz ref clk.
296             - description: Phy reference aux clock.
303             - description: PHY reset in the UFS controller.
322             - description: Phy aux clock.
323             - description: Phy config clock.
330             - description: reset of phy block.
331             - description: phy common block reset.
354             - description: Phy aux clock.
355             - description: Phy config clock.
356             - description: 19.2 MHz ref clk.
357             - description: Phy refgen clk.
366             - description: reset of phy block.
386             - description: Phy aux clock.
387             - description: 19.2 MHz ref clk source.
388             - description: 19.2 MHz ref clk.
389             - description: Phy common block aux clock.
398             - description: reset of phy block.
399             - description: phy common block reset.
418             - description: Phy aux clock.
419             - description: 19.2 MHz ref clk.
420             - description: Phy common block aux clock.
428             - description: reset of phy block.
429             - description: phy common block reset.
447             - description: Phy config clock.
448             - description: 19.2 MHz ref clk.
449             - description: Phy common block aux clock.
457             - description: phy_phy reset.
458             - description: reset of phy block.