Lines Matching +full:ufs +full:- +full:phy
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,msm8996-qmp-ufs-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QMP PHY controller (UFS, MSM8996)
10 - Vinod Koul <vkoul@kernel.org>
13 QMP PHY controller supports physical layer functionality for a number of
14 controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
17 qcom,sc8280xp-qmp-ufs-phy.yaml.
22 - qcom,msm8996-qmp-ufs-phy
23 - qcom,msm8998-qmp-ufs-phy
24 - qcom,sc8180x-qmp-ufs-phy
25 - qcom,sdm845-qmp-ufs-phy
26 - qcom,sm6115-qmp-ufs-phy
27 - qcom,sm6350-qmp-ufs-phy
28 - qcom,sm8150-qmp-ufs-phy
29 - qcom,sm8250-qmp-ufs-phy
30 - qcom,sm8350-qmp-ufs-phy
31 - qcom,sm8450-qmp-ufs-phy
35 - description: serdes
37 "#address-cells":
40 "#size-cells":
49 clock-names:
53 power-domains:
59 reset-names:
61 - const: ufsphy
63 vdda-phy-supply: true
65 vdda-pll-supply: true
67 vddp-ref-clk-supply: true
70 "^phy@[0-9a-f]+$":
72 description: single PHY-provider child node
78 "#clock-cells":
81 "#phy-cells":
85 - reg
86 - "#phy-cells"
91 - compatible
92 - reg
93 - "#address-cells"
94 - "#size-cells"
95 - ranges
96 - clocks
97 - clock-names
98 - resets
99 - reset-names
100 - vdda-phy-supply
101 - vdda-pll-supply
106 - if:
111 - qcom,msm8996-qmp-ufs-phy
116 clock-names:
118 - const: ref
120 - if:
125 - qcom,msm8998-qmp-ufs-phy
126 - qcom,sc8180x-qmp-ufs-phy
127 - qcom,sdm845-qmp-ufs-phy
128 - qcom,sm6115-qmp-ufs-phy
129 - qcom,sm6350-qmp-ufs-phy
130 - qcom,sm8150-qmp-ufs-phy
131 - qcom,sm8250-qmp-ufs-phy
136 clock-names:
138 - const: ref
139 - const: ref_aux
141 - if:
146 - qcom,sm8450-qmp-ufs-phy
151 clock-names:
153 - const: ref
154 - const: ref_aux
155 - const: qref
157 - if:
162 - qcom,msm8998-qmp-ufs-phy
163 - qcom,sc8180x-qmp-ufs-phy
164 - qcom,sdm845-qmp-ufs-phy
165 - qcom,sm6350-qmp-ufs-phy
166 - qcom,sm8150-qmp-ufs-phy
167 - qcom,sm8250-qmp-ufs-phy
168 - qcom,sm8350-qmp-ufs-phy
169 - qcom,sm8450-qmp-ufs-phy
172 "^phy@[0-9a-f]+$":
176 - description: TX lane 1
177 - description: RX lane 1
178 - description: PCS
179 - description: TX lane 2
180 - description: RX lane 2
182 - if:
187 - qcom,msm8996-qmp-ufs-phy
188 - qcom,sm6115-qmp-ufs-phy
191 "^phy@[0-9a-f]+$":
195 - description: TX
196 - description: RX
197 - description: PCS
200 - |
201 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
202 #include <dt-bindings/clock/qcom,rpmh.h>
204 phy-wrapper@1d87000 {
205 compatible = "qcom,sm8250-qmp-ufs-phy";
207 #address-cells = <1>;
208 #size-cells = <1>;
212 clock-names = "ref", "ref_aux";
215 reset-names = "ufsphy";
217 vdda-phy-supply = <&vreg_l6b>;
218 vdda-pll-supply = <&vreg_l3b>;
220 phy@400 {
226 #phy-cells = <0>;