Lines Matching +full:default +full:- +full:trim
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-stm32-usbphyc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
22 |_ PHY port#2 ----| |________________
27 - Amelie Delaunay <amelie.delaunay@foss.st.com>
31 const: st,stm32mp1-usbphyc
42 "#address-cells":
45 "#size-cells":
48 vdda1v1-supply:
51 vdda1v8-supply:
54 '#clock-cells':
61 "^usb-phy@[0|1]$":
64 Each port the controller provides must be represented as a sub-node.
71 phy-supply:
74 "#phy-cells":
79 $ref: /schemas/connector/usb-connector.yaml
83 vbus-supply: true
87 # all optional parameters to tune the interface of the PHY (HS for High-Speed, FS for Full-
88 # Speed, LS for Low-Speed)
90 st,current-boost-microamp:
94 st,no-lsfs-fb-cap:
98 st,decrease-hs-slew-rate:
102 st,tune-hs-dc-level:
105 - <0> normal level
106 - <1> increases the level by 5 to 7 mV
107 - <2> increases the level by 10 to 14 mV
108 - <3> decreases the level by 5 to 7 mV
112 default: 0
114 st,enable-fs-rftime-tuning:
118 st,enable-hs-rftime-reduction:
122 st,trim-hs-current:
125 - <0> = 18.87 mA target current / nominal + 0%
126 - <1> = 19.165 mA target current / nominal + 1.56%
127 - <2> = 19.46 mA target current / nominal + 3.12%
128 - <3> = 19.755 mA target current / nominal + 4.68%
129 - <4> = 20.05 mA target current / nominal + 6.24%
130 - <5> = 20.345 mA target current / nominal + 7.8%
131 - <6> = 20.64 mA target current / nominal + 9.36%
132 - <7> = 20.935 mA target current / nominal + 10.92%
133 - <8> = 21.23 mA target current / nominal + 12.48%
134 - <9> = 21.525 mA target current / nominal + 14.04%
135 - <10> = 21.82 mA target current / nominal + 15.6%
136 - <11> = 22.115 mA target current / nominal + 17.16%
137 - <12> = 22.458 mA target current / nominal + 19.01%
138 - <13> = 22.755 mA target current / nominal + 20.58%
139 - <14> = 23.052 mA target current / nominal + 22.16%
140 - <15> = 23.348 mA target current / nominal + 23.73%
144 default: 0
146 st,trim-hs-impedance:
149 - <0> = no impedance offset
150 - <1> = reduce the impedance by 2 ohms
151 - <2> = reduce the impedance by 4 ohms
152 - <3> = reduce the impedance by 6 ohms
156 default: 0
158 st,tune-squelch-level:
161 - <0> = no shift in threshold
162 - <1> = threshold shift by +7 mV
163 - <2> = threshold shift by -5 mV
164 - <3> = threshold shift by +14 mV
168 default: 0
170 st,enable-hs-rx-gain-eq:
174 st,tune-hs-rx-offset:
177 - <0> = no offset
178 - <1> = offset of +5 mV
179 - <2> = offset of +10 mV
180 - <3> = offset of -5 mV
184 default: 0
186 st,no-hs-ftime-ctrl:
187 description: Disables the HS fall time control of single ended signals during pre-emphasis
190 st,no-lsfs-sc:
194 st,enable-hs-tx-staggering:
199 - if:
205 "#phy-cells":
209 "#phy-cells":
216 - reg
217 - phy-supply
218 - "#phy-cells"
223 - compatible
224 - reg
225 - clocks
226 - "#address-cells"
227 - "#size-cells"
228 - vdda1v1-supply
229 - vdda1v8-supply
230 - usb-phy@0
231 - usb-phy@1
236 - |
237 #include <dt-bindings/clock/stm32mp1-clks.h>
238 #include <dt-bindings/reset/stm32mp1-resets.h>
240 compatible = "st,stm32mp1-usbphyc";
244 vdda1v1-supply = <®11>;
245 vdda1v8-supply = <®18>;
246 #address-cells = <1>;
247 #size-cells = <0>;
248 #clock-cells = <0>;
250 usbphyc_port0: usb-phy@0 {
252 phy-supply = <&vdd_usb>;
253 #phy-cells = <0>;
254 st,tune-hs-dc-level = <2>;
255 st,enable-fs-rftime-tuning;
256 st,enable-hs-rftime-reduction;
257 st,trim-hs-current = <15>;
258 st,trim-hs-impedance = <1>;
259 st,tune-squelch-level = <3>;
260 st,tune-hs-rx-offset = <2>;
261 st,no-lsfs-sc;
263 compatible = "usb-a-connector";
264 vbus-supply = <&vbus_sw>;
268 usbphyc_port1: usb-phy@1 {
270 phy-supply = <&vdd_usb>;
271 #phy-cells = <1>;
272 st,tune-hs-dc-level = <2>;
273 st,enable-fs-rftime-tuning;
274 st,enable-hs-rftime-reduction;
275 st,trim-hs-current = <15>;
276 st,trim-hs-impedance = <1>;
277 st,tune-squelch-level = <3>;
278 st,tune-hs-rx-offset = <2>;
279 st,no-lsfs-sc;