Lines Matching +full:sata +full:- +full:controller
5 for SATA and PCIe.
7 Required properties (controller (parent) node):
8 - compatible : Should be "st,miphy365x-phy"
9 - st,syscfg : Phandle / integer array property. Phandle of sysconfig group
11 an entry for each port sub-node, specifying the control
14 Required nodes : A sub-node is required for each channel the controller
16 'reg' and 'reg-names' properties are used inside these
17 nodes to describe the controller's topology. These nodes
21 - #phy-cells : Should be 1 (See second example)
23 - PHY_TYPE_SATA
24 - PHY_TYPE_PCI
25 - reg : Address and length of register sets for each device in
26 "reg-names"
27 - reg-names : The names of the register addresses corresponding to the
29 - sata: For SATA devices
30 - pcie: For PCIe devices
33 - st,sata-gen : Generation of locally attached SATA IP. Expected values
36 - st,pcie-tx-pol-inv : Bool property to invert the polarity PCIe Tx (Txn/Txp)
37 - st,sata-tx-pol-inv : Bool property to invert the polarity SATA Tx (Txn/Txp)
42 compatible = "st,miphy365x-phy";
44 #address-cells = <1>;
45 #size-cells = <1>;
50 reg-names = "sata", "pcie";
51 #phy-cells = <1>;
52 st,sata-gen = <3>;
57 reg-names = "sata", "pcie", "syscfg";
58 #phy-cells = <1>;
59 st,pcie-tx-pol-inv;
71 #include <dt-bindings/phy/phy.h>
73 sata0: sata@fe380000 {