Lines Matching +full:sw +full:- +full:mode

8 - compatible	: Should be "st,miphy28lp-phy".
9 - st,syscfg	: Should be a phandle of the system configuration register group
10 		  which contain the SATA, PCIe or USB3 mode setting bits.
12 Required nodes	:  A sub-node is required for each channel the controller
14 		   'reg' and 'reg-names' properties are used inside these
19 - #phy-cells	: Should be 1 (See second example)
21 			- PHY_TYPE_SATA
22 			- PHY_TYPE_PCI
23 			- PHY_TYPE_USB3
24 - reg		: Address and length of the register set for the device.
25 - reg-names	: The names of the register addresses corresponding to the registers
27 		  registers used as glue-logic to setup the device for SATA/PCIe or USB3
29 - st,syscfg	: Offset of the parent configuration register.
30 - resets	: phandle to the parent reset controller.
31 - reset-names	: Associated name must be "miphy-sw-rst".
34 - st,osc-rdy		: to check the MIPHY0_OSC_RDY status in the glue-logic. This
37 - st,osc-force-ext	: to select the external oscillator. This can change from
39 - st,sata_gen		: to select which SATA_SPDMODE has to be set in the SATA system config
41 - st,px_rx_pol_inv	: to invert polarity of RXn/RXp (respectively negative line and positive
43 - st,scc-on		: enable ssc to reduce effects of EMI (only for sata or PCIe).
44 - st,tx-impedance-comp	: to compensate tx impedance avoiding out of range values.
49 			compatible = "st,miphy28lp-phy";
51 			#address-cells	= <1>;
52 			#size-cells	= <1>;
59 				reg-names = "sata-up",
60 					    "pcie-up",
64 				#phy-cells = <1>;
65 				st,osc-rdy;
66 				reset-names = "miphy-sw-rst";
74 				reg-names = "sata-up",
75 					    "pcie-up",
80 				#phy-cells = <1>;
81 				st,osc-force-ext;
82 				reset-names = "miphy-sw-rst";
89 				reg-names = "pipew",
90 					    "usb3-up";
94 				#phy-cells = <1>;
95 				reset-names = "miphy-sw-rst";
106 specifying which configuration to use, as described in phy-bindings.txt.
117 include/dt-bindings/phy/phy.h