Lines Matching +full:wait +full:- +full:delay
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra20-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dmitry Osipenko <digetx@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Thierry Reding <thierry.reding@gmail.com>
17 - items:
18 - enum:
19 - nvidia,tegra124-usb-phy
20 - nvidia,tegra114-usb-phy
21 - enum:
22 - nvidia,tegra30-usb-phy
23 - items:
24 - enum:
25 - nvidia,tegra30-usb-phy
26 - nvidia,tegra20-usb-phy
38 - items:
39 - description: Registers clock
40 - description: Main PHY clock
42 - items:
43 - description: Registers clock
44 - description: Main PHY clock
45 - description: ULPI PHY clock
47 - items:
48 - description: Registers clock
49 - description: Main PHY clock
50 - description: UTMI pads control registers clock
52 - items:
53 - description: Registers clock
54 - description: Main PHY clock
55 - description: UTMI timeout clock
56 - description: UTMI pads control registers clock
58 clock-names:
60 - items:
61 - const: reg
62 - const: pll_u
64 - items:
65 - const: reg
66 - const: pll_u
67 - const: ulpi-link
69 - items:
70 - const: reg
71 - const: pll_u
72 - const: utmi-pads
74 - items:
75 - const: reg
76 - const: pll_u
77 - const: timer
78 - const: utmi-pads
85 - maxItems: 1
88 - items:
89 - description: PHY reset
90 - description: UTMI pads reset
92 reset-names:
94 - const: usb
96 - items:
97 - const: usb
98 - const: utmi-pads
100 "#phy-cells":
112 vbus-supply:
115 nvidia,has-legacy-mode:
122 nvidia,is-wired:
128 nvidia,has-utmi-pad-registers:
134 nvidia,hssync-start-delay:
139 Number of 480 MHz clock cycles to wait before start of sync launches
142 nvidia,elastic-limit:
148 nvidia,idle-wait-delay:
153 Number of 480 MHz clock cycles of idle to wait before declare IDLE.
155 nvidia,term-range-adj:
161 nvidia,xcvr-setup:
167 nvidia,xcvr-setup-use-fuses:
168 description: Indicates that the value is read from the on-chip fuses.
171 nvidia,xcvr-lsfslew:
177 nvidia,xcvr-lsrslew:
183 nvidia,xcvr-hsslew:
189 nvidia,hssquelch-level:
195 nvidia,hsdiscon-level:
201 nvidia,phy-reset-gpio:
206 $ref: /schemas/types.yaml#/definitions/phandle-array
208 - items:
209 - description: Phandle to Power Management controller.
210 - description: USB controller ID.
215 - compatible
216 - reg
217 - clocks
218 - clock-names
219 - resets
220 - reset-names
221 - "#phy-cells"
222 - phy_type
227 - if:
241 reset-names:
245 - nvidia,hssync-start-delay
246 - nvidia,elastic-limit
247 - nvidia,idle-wait-delay
248 - nvidia,term-range-adj
249 - nvidia,xcvr-lsfslew
250 - nvidia,xcvr-lsrslew
253 - required: ["nvidia,xcvr-setup"]
254 - required: ["nvidia,xcvr-setup-use-fuses"]
260 const: nvidia,tegra30-usb-phy
267 clock-names:
269 - const: reg
270 - const: pll_u
271 - const: utmi-pads
274 - nvidia,xcvr-hsslew
275 - nvidia,hssquelch-level
276 - nvidia,hsdiscon-level
283 clock-names:
285 - const: reg
286 - const: pll_u
287 - const: timer
288 - const: utmi-pads
290 - if:
305 clock-names:
310 - items:
311 - const: reg
312 - const: pll_u
314 - items:
315 - const: reg
316 - const: pll_u
317 - const: ulpi-link
323 reset-names:
328 - |
329 #include <dt-bindings/clock/tegra124-car.h>
331 usb-phy@7d008000 {
332 compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
340 clock-names = "reg", "pll_u", "utmi-pads";
342 reset-names = "usb", "utmi-pads";
343 #phy-cells = <0>;
344 nvidia,hssync-start-delay = <0>;
345 nvidia,idle-wait-delay = <17>;
346 nvidia,elastic-limit = <16>;
347 nvidia,term-range-adj = <6>;
348 nvidia,xcvr-setup = <9>;
349 nvidia,xcvr-lsfslew = <0>;
350 nvidia,xcvr-lsrslew = <3>;
351 nvidia,hssquelch-level = <2>;
352 nvidia,hsdiscon-level = <5>;
353 nvidia,xcvr-hsslew = <12>;
357 - |
358 #include <dt-bindings/clock/tegra20-car.h>
360 usb-phy@c5004000 {
361 compatible = "nvidia,tegra20-usb-phy";
368 clock-names = "reg", "pll_u", "ulpi-link";
370 reset-names = "usb", "utmi-pads";
371 #phy-cells = <0>;