Lines Matching +full:25 +full:gbase +full:- +full:er
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/microchip,sparx5-serdes.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Steen Hegelund <steen.hegelund@microchip.com>
21 * Rx built-in fault detector (loss-of-lock/loss-of-signal)
22 * Adjustable tx de-emphasis (FFE)
31 The SERDES6G is a high-speed SERDES interface, which can operate at
34 * 100 Mbps (100BASE-FX)
35 * 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
36 * 3.125 Gbps (2.5GBASE-X/2.5GBASE-KX)
37 * 5.15625 Gbps (5GBASE-KR/5G-USXGMII)
41 The SERDES10G is a high-speed SERDES interface, which can operate at
44 * 100 Mbps (100BASE-FX)
45 * 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
46 * 3.125 Gbps (2.5GBASE-X/2.5GBASE-KX)
48 * 5.15625 Gbps (5GBASE-KR/5G-USXGMII)
49 * 10 Gbps (10G-USGMII)
50 * 10.3125 Gbps (10GBASE-R/10GBASE-KR/USXGMII)
54 The SERDES25G is a high-speed SERDES interface, which can operate at
57 * 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
58 * 3.125 Gbps (2.5GBASE-X/2.5GBASE-KX)
60 * 5.15625 Gbps (5GBASE-KR/5G-USXGMII)
61 * 10 Gbps (10G-USGMII)
62 * 10.3125 Gbps (10GBASE-R/10GBASE-KR/USXGMII)
63 * 25.78125 Gbps (25GBASE-KR/25GBASE-CR/25GBASE-SR/25GBASE-LR/25GBASE-ER)
67 pattern: "^serdes@[0-9a-f]+$"
70 const: microchip,sparx5-serdes
75 '#phy-cells':
78 - The main serdes input port
84 - compatible
85 - reg
86 - '#phy-cells'
87 - clocks
92 - |
94 compatible = "microchip,sparx5-serdes";
95 #phy-cells = <1>;