Lines Matching +full:otg +full:- +full:vbus

1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/allwinner,sun5i-a13-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Chen-Yu Tsai <wens@csie.org>
11   - Maxime Ripard <mripard@kernel.org>
14   "#phy-cells":
18     const: allwinner,sun5i-a13-usb-phy
22       - description: PHY Control registers
23       - description: PHY PMU1 registers
25   reg-names:
27       - const: phy_ctrl
28       - const: pmu1
32     description: USB OTG PHY bus clock
34   clock-names:
39       - description: USB OTG reset
40       - description: USB Host 1 Controller reset
42   reset-names:
44       - const: usb0_reset
45       - const: usb1_reset
47   usb0_id_det-gpios:
49     description: GPIO to the USB OTG ID pin
51   usb0_vbus_det-gpios:
53     description: GPIO to the USB OTG VBUS detect pin
55   usb0_vbus_power-supply:
56     description: Power supply to detect the USB OTG VBUS
58   usb0_vbus-supply:
59     description: Regulator controlling USB OTG VBUS
61   usb1_vbus-supply:
65   - "#phy-cells"
66   - compatible
67   - clocks
68   - clock-names
69   - reg
70   - reg-names
71   - resets
72   - reset-names
77   - |
78     #include <dt-bindings/gpio/gpio.h>
79     #include <dt-bindings/clock/sun5i-ccu.h>
80     #include <dt-bindings/reset/sun5i-ccu.h>
83         #phy-cells = <1>;
84         compatible = "allwinner,sun5i-a13-usb-phy";
86         reg-names = "phy_ctrl", "pmu1";
88         clock-names = "usb_phy";
90         reset-names = "usb0_reset", "usb1_reset";
91         usb0_id_det-gpios = <&pio 6 2 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PG2 */
92         usb0_vbus_det-gpios = <&pio 6 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PG1 */
93         usb0_vbus-supply = <&reg_usb0_vbus>;
94         usb1_vbus-supply = <&reg_usb1_vbus>;