Lines Matching +full:syscon +full:- +full:pcie +full:- +full:mode
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/pci/ti,j721e-pci-ep.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: TI J721E PCI EP (PCIe Wrapper)
11 - Kishon Vijay Abraham I <kishon@ti.com>
16 - const: ti,j721e-pcie-ep
17 - const: ti,j784s4-pcie-ep
18 - description: PCIe EP controller in AM64
20 - const: ti,am64-pcie-ep
21 - const: ti,j721e-pcie-ep
22 - description: PCIe EP controller in J7200
24 - const: ti,j7200-pcie-ep
25 - const: ti,j721e-pcie-ep
30 reg-names:
32 - const: intd_cfg
33 - const: user_cfg
34 - const: reg
35 - const: mem
37 ti,syscon-pcie-ctrl:
38 $ref: /schemas/types.yaml#/definitions/phandle-array
40 - items:
41 - description: Phandle to the SYSCON entry
42 - description: pcie_ctrl register offset within SYSCON
43 description: Specifier for configuring PCIe mode and link speed.
45 power-domains:
50 description: clock-specifier to represent input to the PCIe
52 clock-names:
54 - const: fck
56 dma-coherent:
57 description: Indicates that the PCIe IP block can ensure the coherency
62 interrupt-names:
64 - const: link_state
67 - $ref: cdns-pcie-ep.yaml#
68 - if:
72 - ti,am64-pcie-ep
75 num-lanes:
78 - if:
82 - ti,j7200-pcie-ep
83 - ti,j721e-pcie-ep
86 num-lanes:
90 - if:
94 - ti,j784s4-pcie-ep
97 num-lanes:
102 - compatible
103 - reg
104 - reg-names
105 - ti,syscon-pcie-ctrl
106 - max-link-speed
107 - num-lanes
108 - power-domains
109 - clocks
110 - clock-names
111 - max-functions
112 - phys
113 - phy-names
118 - |
119 #include <dt-bindings/soc/ti,sci_pm_domain.h>
122 #address-cells = <2>;
123 #size-cells = <2>;
125 pcie0_ep: pcie-ep@d000000 {
126 compatible = "ti,j721e-pcie-ep";
131 reg-names = "intd_cfg", "user_cfg", "reg", "mem";
132 ti,syscon-pcie-ctrl = <&pcie0_ctrl 0x4070>;
133 max-link-speed = <3>;
134 num-lanes = <2>;
135 power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>;
137 clock-names = "fck";
138 max-functions = /bits/ 8 <6>;
139 dma-coherent;
141 phy-names = "pcie-phy";