Lines Matching +full:syscon +full:- +full:pcie +full:- +full:mode
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/pci/ti,am65-pci-ep.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Kishon Vijay Abraham I <kishon@ti.com>
14 - $ref: pci-ep.yaml#
19 - ti,am654-pcie-ep
24 reg-names:
26 - const: app
27 - const: dbics
28 - const: addr_space
29 - const: atu
31 power-domains:
34 ti,syscon-pcie-mode:
35 $ref: /schemas/types.yaml#/definitions/phandle-array
37 - items:
38 - description: Phandle to the SYSCON entry
39 - description: pcie_ctrl register offset within SYSCON
40 description: Phandle to the SYSCON entry required for configuring PCIe in RC or EP mode.
45 dma-coherent: true
48 - compatible
49 - reg
50 - reg-names
51 - max-link-speed
52 - power-domains
53 - ti,syscon-pcie-mode
54 - dma-coherent
59 - |
60 #include <dt-bindings/interrupt-controller/arm-gic.h>
61 #include <dt-bindings/interrupt-controller/irq.h>
62 #include <dt-bindings/soc/ti,sci_pm_domain.h>
64 pcie0_ep: pcie-ep@5500000 {
65 compatible = "ti,am654-pcie-ep";
70 reg-names = "app", "dbics", "addr_space", "atu";
71 power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
72 ti,syscon-pcie-mode = <&scm_conf 0x4060>;
73 max-link-speed = <2>;
74 dma-coherent;