Lines Matching +full:exynos5433 +full:- +full:pinctrl
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/samsung,exynos-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Szyprowski <m.szyprowski@samsung.com>
11 - Jaehoon Chung <jh80.chung@samsung.com>
14 Exynos5433 SoC PCIe host controller is based on the Synopsys DesignWare
16 snps,dw-pcie.yaml.
19 - $ref: /schemas/pci/snps,dw-pcie.yaml#
23 const: samsung,exynos5433-pcie
27 - description: Data Bus Interface (DBI) registers.
28 - description: External Local Bus interface (ELBI) registers.
29 - description: PCIe configuration space region.
31 reg-names:
33 - const: dbi
34 - const: elbi
35 - const: config
42 - description: PCIe bridge clock
43 - description: PCIe bus clock
45 clock-names:
47 - const: pcie
48 - const: pcie_bus
53 vdd10-supply:
57 vdd18-supply:
61 num-lanes:
64 num-viewport:
68 - reg
69 - reg-names
70 - interrupts
71 - "#address-cells"
72 - "#size-cells"
73 - "#interrupt-cells"
74 - interrupt-map
75 - interrupt-map-mask
76 - ranges
77 - bus-range
78 - device_type
79 - num-lanes
80 - num-viewport
81 - clocks
82 - clock-names
83 - phys
84 - vdd10-supply
85 - vdd18-supply
90 - |
91 #include <dt-bindings/interrupt-controller/irq.h>
92 #include <dt-bindings/interrupt-controller/arm-gic.h>
93 #include <dt-bindings/clock/exynos5433.h>
96 compatible = "samsung,exynos5433-pcie";
98 reg-names = "dbi", "elbi", "config";
99 #address-cells = <3>;
100 #size-cells = <2>;
101 #interrupt-cells = <1>;
105 clock-names = "pcie", "pcie_bus";
107 pinctrl-0 = <&pcie_bus &pcie_wlanen>;
108 pinctrl-names = "default";
109 num-lanes = <1>;
110 num-viewport = <3>;
111 bus-range = <0x00 0xff>;
114 vdd10-supply = <&ldo6_reg>;
115 vdd18-supply = <&ldo7_reg>;
116 interrupt-map-mask = <0 0 0 0>;
117 interrupt-map = <0 0 0 0 &gic GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;