Lines Matching full:pcie
7 - "qcom,pcie-ipq8064" for ipq8064
8 - "qcom,pcie-ipq8064-v2" for ipq8064 rev 2 or ipq8065
9 - "qcom,pcie-apq8064" for apq8064
10 - "qcom,pcie-apq8084" for apq8084
11 - "qcom,pcie-msm8996" for msm8996 or apq8096
12 - "qcom,pcie-ipq4019" for ipq4019
13 - "qcom,pcie-ipq8074" for ipq8074
14 - "qcom,pcie-qcs404" for qcs404
15 - "qcom,pcie-sc8180x" for sc8180x
16 - "qcom,pcie-sdm845" for sdm845
17 - "qcom,pcie-sm8250" for sm8250
18 - "qcom,pcie-sm8450-pcie0" for PCIe0 on sm8450
19 - "qcom,pcie-sm8450-pcie1" for PCIe1 on sm8450
20 - "qcom,pcie-ipq6018" for ipq6018
32 - "dbi" DesignWare PCIe registers
34 - "config" PCIe configuration space
40 Definition: Should be "pci". As specified in snps,dw-pcie.yaml
45 Definition: Should be 3. As specified in snps,dw-pcie.yaml
50 Definition: Should be 2. As specified in snps,dw-pcie.yaml
55 Definition: As specified in snps,dw-pcie.yaml
70 Definition: Should be 1. As specified in snps,dw-pcie.yaml
75 Definition: As specified in snps,dw-pcie.yaml
80 Definition: As specified in snps,dw-pcie.yaml
98 - "core" Clocks the pcie hw block
99 - "phy" Clocks the pcie PHY block
100 - "aux" Clocks the pcie AUX block
101 - "ref" Clocks the pcie ref block
124 - "iface" PCIe to SysNOC BIU clock
134 - "iface" PCIe to SysNOC BIU clock
158 - "tbu" PCIe TBU clock
170 - "tbu" PCIe TBU clock
171 - "ddrss_sf_tbu" PCIe SF TBU clock
183 - "tbu" PCIe TBU clock
184 - "ddrss_sf_tbu" PCIe SF TBU clock
272 - "pci" PCIe core reset
299 Definition: A phandle to the PCIe endpoint power supply
315 - "perst-gpios" PCIe endpoint reset signal line
316 - "wake-gpios" PCIe endpoint wake signal line
319 pcie@1b500000 {
320 compatible = "qcom,pcie-apq8064", "qcom,pcie-ipq8064", "snps,dw-pcie";
361 compatible = "qcom,pcie-apq8084", "snps,dw-pcie";