Lines Matching +full:mt8192 +full:- +full:pcie
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/mediatek-pcie-gen3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Gen3 PCIe controller on MediaTek SoCs
10 - Jianjun Wang <jianjun.wang@mediatek.com>
13 PCIe Gen3 MAC controller for MediaTek SoCs, it supports Gen3 speed
16 This PCIe controller supports up to 256 MSI vectors, the MSI hardware
19 +-----+
21 +-----+
24 port->irq
26 +-+-+-+-+-+-+-+-+
27 |0|1|2|3|4|5|6|7| (PCIe intc)
28 +-+-+-+-+-+-+-+-+
31 +-------+ +------+ +-----------+
33 +-+-+---+--+--+ +-+-+---+--+--+ +-+-+---+--+--+
35 +-+-+---+--+--+ +-+-+---+--+--+ +-+-+---+--+--+
49 - items:
50 - enum:
51 - mediatek,mt7986-pcie
52 - mediatek,mt8188-pcie
53 - mediatek,mt8195-pcie
54 - const: mediatek,mt8192-pcie
55 - const: mediatek,mt8192-pcie
60 reg-names:
62 - const: pcie-mac
71 iommu-map:
74 iommu-map-mask:
81 reset-names:
91 clock-names:
95 assigned-clocks:
98 assigned-clock-parents:
104 phy-names:
106 - const: pcie-phy
108 power-domains:
111 '#interrupt-cells':
114 interrupt-controller:
118 '#address-cells':
120 '#interrupt-cells':
122 interrupt-controller: true
125 - '#address-cells'
126 - '#interrupt-cells'
127 - interrupt-controller
132 - compatible
133 - reg
134 - reg-names
135 - interrupts
136 - ranges
137 - clocks
138 - clock-names
139 - '#interrupt-cells'
140 - interrupt-controller
143 - $ref: /schemas/pci/pci-bus.yaml#
144 - if:
147 const: mediatek,mt8192-pcie
150 clock-names:
152 - const: pl_250m
153 - const: tl_26m
154 - const: tl_96m
155 - const: tl_32k
156 - const: peri_26m
157 - const: top_133m
158 - if:
163 - mediatek,mt8188-pcie
164 - mediatek,mt8195-pcie
167 clock-names:
169 - const: pl_250m
170 - const: tl_26m
171 - const: tl_96m
172 - const: tl_32k
173 - const: peri_26m
174 - const: peri_mem
175 - if:
180 - mediatek,mt7986-pcie
183 clock-names:
185 - const: pl_250m
186 - const: tl_26m
187 - const: peri_26m
188 - const: top_133m
193 - |
194 #include <dt-bindings/interrupt-controller/arm-gic.h>
195 #include <dt-bindings/interrupt-controller/irq.h>
198 #address-cells = <2>;
199 #size-cells = <2>;
201 pcie: pcie@11230000 {
202 compatible = "mediatek,mt8192-pcie";
204 #address-cells = <3>;
205 #size-cells = <2>;
207 reg-names = "pcie-mac";
209 bus-range = <0x00 0xff>;
218 clock-names = "pl_250m", "tl_26m", "tl_96m",
220 assigned-clocks = <&topckgen 50>;
221 assigned-clock-parents = <&topckgen 91>;
224 phy-names = "pcie-phy";
228 reset-names = "phy", "mac";
230 #interrupt-cells = <1>;
231 interrupt-map-mask = <0 0 0 0x7>;
232 interrupt-map = <0 0 0 1 &pcie_intc 0>,
236 pcie_intc: interrupt-controller {
237 #address-cells = <0>;
238 #interrupt-cells = <1>;
239 interrupt-controller;