Lines Matching +full:platform +full:- +full:level
2 ----------------------------------------------------
4 Devices work at voltage-current-frequency combinations and some implementations
13 Binding 1: operating-points
16 This binding only supports voltage-frequency pairs.
19 - operating-points: An array of 2-tuples items, and each item consists
20 of frequency and voltage like <freq-kHz vol-uV>.
27 compatible = "arm,cortex-a9";
29 next-level-cache = <&L2>;
30 operating-points = <
39 Binding 2: operating-points-v2
42 * Property: operating-points-v2
44 Devices supporting OPPs must set their "operating-points-v2" property with
54 should be documented as Documentation/devicetree/bindings/power/<vendor>-opp.txt
55 and should have a compatible description like: "operating-points-v2-<vendor>".
63 - compatible: Allow OPPs to express their compatibility. It should be:
64 "operating-points-v2".
66 - OPP nodes: One or more OPP nodes describing voltage-current-frequency
69 is present only to indicate dependency between devices using the opp-shared
73 - opp-shared: Indicates that device nodes using this OPP Table Node's phandle
78 - status: Marks the OPP table enabled/disabled.
83 This defines voltage-current-frequency combinations along with other related
87 - opp-hz: Frequency in Hz, expressed as a 64-bit big-endian integer. This is a
92 - opp-peak-kBps: Peak bandwidth in kilobytes per second, expressed as an array
93 of 32-bit big-endian integers. Each element of the array represents the
98 - opp-microvolt: voltage in micro Volts.
113 - opp-microvolt-<name>: Named opp-microvolt property. This is exactly similar to
114 the above opp-microvolt property, but allows multiple voltage ranges to be
115 provided for the same OPP. At runtime, the platform can pick a <name> and
116 matching opp-microvolt-<name> property will be enabled for all OPPs. If the
117 platform doesn't pick a specific <name> or the <name> doesn't match with any
118 opp-microvolt-<name> properties, then opp-microvolt property shall be used, if
121 - opp-microamp: The maximum current drawn by the device in microamperes
126 Should only be set if opp-microvolt is set for the OPP.
136 - opp-microamp-<name>: Named opp-microamp property. Similar to
137 opp-microvolt-<name> property, but for microamp instead.
139 - opp-level: A value representing the performance level of the device,
140 expressed as a 32-bit integer.
142 - opp-avg-kBps: Average bandwidth in kilobytes per second, expressed as an array
143 of 32-bit big-endian integers. Each element of the array represents the
146 meaningful in OPP tables where opp-peak-kBps is present.
148 - clock-latency-ns: Specifies the maximum possible transition latency (in
151 - turbo-mode: Marks the OPP to be used only for turbo modes. Turbo mode is
156 - opp-suspend: Marks the OPP to be used during device suspend. If multiple OPPs
157 in the table have this, the OPP with highest opp-hz will be used.
159 - opp-supported-hw: This property allows a platform to enable only a subset of
164 sub-group of hardware versions supported by the OPP. i.e. <sub-group A>,
165 <sub-group B>, etc. The OPP will be enabled if _any_ of these sub-groups match
168 Each sub-group is a platform defined array representing the hierarchy of
169 hardware versions supported by the platform. For a platform with three
172 opp-supported-hw = <X1 Y1 Z1>, <X2 Y2 Z2>, <X3 Y3 Z3>.
174 Each level (eg. X1) in version hierarchy is represented by a 32 bit value, one
175 bit per version and so there can be maximum 32 versions per level. Logical AND
176 (&) operation is performed for each level with the hardware's level version
177 and a non-zero output for _all_ the levels in a sub-group means the OPP is
178 supported by hardware. A value of 0xFFFFFFFF for each level in the sub-group
181 - status: Marks the node enabled/disabled.
183 - required-opps: This contains phandle to an OPP node in another device's OPP
191 Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states together.
195 #address-cells = <1>;
196 #size-cells = <0>;
199 compatible = "arm,cortex-a9";
201 next-level-cache = <&L2>;
203 clock-names = "cpu";
204 cpu-supply = <&cpu_supply0>;
205 operating-points-v2 = <&cpu0_opp_table>;
209 compatible = "arm,cortex-a9";
211 next-level-cache = <&L2>;
213 clock-names = "cpu";
214 cpu-supply = <&cpu_supply0>;
215 operating-points-v2 = <&cpu0_opp_table>;
220 compatible = "operating-points-v2";
221 opp-shared;
223 opp-1000000000 {
224 opp-hz = /bits/ 64 <1000000000>;
225 opp-microvolt = <975000 970000 985000>;
226 opp-microamp = <70000>;
227 clock-latency-ns = <300000>;
228 opp-suspend;
230 opp-1100000000 {
231 opp-hz = /bits/ 64 <1100000000>;
232 opp-microvolt = <1000000 980000 1010000>;
233 opp-microamp = <80000>;
234 clock-latency-ns = <310000>;
236 opp-1200000000 {
237 opp-hz = /bits/ 64 <1200000000>;
238 opp-microvolt = <1025000>;
239 clock-latency-ns = <290000>;
240 turbo-mode;
245 Example 2: Single cluster, Quad-core Qualcom-krait, switches DVFS states
250 #address-cells = <1>;
251 #size-cells = <0>;
256 next-level-cache = <&L2>;
258 clock-names = "cpu";
259 cpu-supply = <&cpu_supply0>;
260 operating-points-v2 = <&cpu_opp_table>;
266 next-level-cache = <&L2>;
268 clock-names = "cpu";
269 cpu-supply = <&cpu_supply1>;
270 operating-points-v2 = <&cpu_opp_table>;
276 next-level-cache = <&L2>;
278 clock-names = "cpu";
279 cpu-supply = <&cpu_supply2>;
280 operating-points-v2 = <&cpu_opp_table>;
286 next-level-cache = <&L2>;
288 clock-names = "cpu";
289 cpu-supply = <&cpu_supply3>;
290 operating-points-v2 = <&cpu_opp_table>;
295 compatible = "operating-points-v2";
298 * Missing opp-shared property means CPUs switch DVFS states
302 opp-1000000000 {
303 opp-hz = /bits/ 64 <1000000000>;
304 opp-microvolt = <975000 970000 985000>;
305 opp-microamp = <70000>;
306 clock-latency-ns = <300000>;
307 opp-suspend;
309 opp-1100000000 {
310 opp-hz = /bits/ 64 <1100000000>;
311 opp-microvolt = <1000000 980000 1010000>;
312 opp-microamp = <80000>;
313 clock-latency-ns = <310000>;
315 opp-1200000000 {
316 opp-hz = /bits/ 64 <1200000000>;
317 opp-microvolt = <1025000>;
318 opp-microamp = <90000;
319 lock-latency-ns = <290000>;
320 turbo-mode;
325 Example 3: Dual-cluster, Dual-core per cluster. CPUs within a cluster switch
330 #address-cells = <1>;
331 #size-cells = <0>;
334 compatible = "arm,cortex-a7";
336 next-level-cache = <&L2>;
338 clock-names = "cpu";
339 cpu-supply = <&cpu_supply0>;
340 operating-points-v2 = <&cluster0_opp>;
344 compatible = "arm,cortex-a7";
346 next-level-cache = <&L2>;
348 clock-names = "cpu";
349 cpu-supply = <&cpu_supply0>;
350 operating-points-v2 = <&cluster0_opp>;
354 compatible = "arm,cortex-a15";
356 next-level-cache = <&L2>;
358 clock-names = "cpu";
359 cpu-supply = <&cpu_supply1>;
360 operating-points-v2 = <&cluster1_opp>;
364 compatible = "arm,cortex-a15";
366 next-level-cache = <&L2>;
368 clock-names = "cpu";
369 cpu-supply = <&cpu_supply1>;
370 operating-points-v2 = <&cluster1_opp>;
375 compatible = "operating-points-v2";
376 opp-shared;
378 opp-1000000000 {
379 opp-hz = /bits/ 64 <1000000000>;
380 opp-microvolt = <975000 970000 985000>;
381 opp-microamp = <70000>;
382 clock-latency-ns = <300000>;
383 opp-suspend;
385 opp-1100000000 {
386 opp-hz = /bits/ 64 <1100000000>;
387 opp-microvolt = <1000000 980000 1010000>;
388 opp-microamp = <80000>;
389 clock-latency-ns = <310000>;
391 opp-1200000000 {
392 opp-hz = /bits/ 64 <1200000000>;
393 opp-microvolt = <1025000>;
394 opp-microamp = <90000>;
395 clock-latency-ns = <290000>;
396 turbo-mode;
401 compatible = "operating-points-v2";
402 opp-shared;
404 opp-1300000000 {
405 opp-hz = /bits/ 64 <1300000000>;
406 opp-microvolt = <1050000 1045000 1055000>;
407 opp-microamp = <95000>;
408 clock-latency-ns = <400000>;
409 opp-suspend;
411 opp-1400000000 {
412 opp-hz = /bits/ 64 <1400000000>;
413 opp-microvolt = <1075000>;
414 opp-microamp = <100000>;
415 clock-latency-ns = <400000>;
417 opp-1500000000 {
418 opp-hz = /bits/ 64 <1500000000>;
419 opp-microvolt = <1100000 1010000 1110000>;
420 opp-microamp = <95000>;
421 clock-latency-ns = <400000>;
422 turbo-mode;
432 compatible = "vendor,cpu-type";
435 vcc0-supply = <&cpu_supply0>;
436 vcc1-supply = <&cpu_supply1>;
437 vcc2-supply = <&cpu_supply2>;
438 operating-points-v2 = <&cpu0_opp_table>;
443 compatible = "operating-points-v2";
444 opp-shared;
446 opp-1000000000 {
447 opp-hz = /bits/ 64 <1000000000>;
448 opp-microvolt = <970000>, /* Supply 0 */
451 opp-microamp = <70000>, /* Supply 0 */
454 clock-latency-ns = <300000>;
459 opp-1000000000 {
460 opp-hz = /bits/ 64 <1000000000>;
461 opp-microvolt = <975000 970000 985000>, /* Supply 0 */
464 opp-microamp = <70000>, /* Supply 0 */
467 clock-latency-ns = <300000>;
472 opp-1000000000 {
473 opp-hz = /bits/ 64 <1000000000>;
474 opp-microvolt = <975000 970000 985000>, /* Supply 0 */
477 opp-microamp = <70000>, /* Supply 0 */
480 clock-latency-ns = <300000>;
485 Example 5: opp-supported-hw
486 (example: three level hierarchy of versions: cuts, substrate and process)
491 compatible = "arm,cortex-a7";
494 cpu-supply = <&cpu_supply>
495 operating-points-v2 = <&cpu0_opp_table_slow>;
500 compatible = "operating-points-v2";
501 opp-shared;
503 opp-600000000 {
508 opp-supported-hw = <0xF 0xFFFFFFFF 0xFFFFFFFF>
509 opp-hz = /bits/ 64 <600000000>;
513 opp-800000000 {
516 * - cuts: only one, 6th cut (represented by 6th bit).
517 * - substrate: supports 16 different substrate versions
518 * - process: supports 9 different process versions
520 opp-supported-hw = <0x20 0xff0000ff 0x0000f4f0>
521 opp-hz = /bits/ 64 <800000000>;
525 opp-900000000 {
528 * - All cuts and substrate where process version is 0x2.
529 * - All cuts and process where substrate version is 0x2.
531 opp-supported-hw = <0xFFFFFFFF 0xFFFFFFFF 0x02>, <0xFFFFFFFF 0x01 0xFFFFFFFF>
532 opp-hz = /bits/ 64 <900000000>;
538 Example 6: opp-microvolt-<name>, opp-microamp-<name>:
544 compatible = "arm,cortex-a7";
547 operating-points-v2 = <&cpu0_opp_table>;
552 compatible = "operating-points-v2";
553 opp-shared;
555 opp-1000000000 {
556 opp-hz = /bits/ 64 <1000000000>;
557 opp-microvolt-slow = <915000 900000 925000>;
558 opp-microvolt-fast = <975000 970000 985000>;
559 opp-microamp-slow = <70000>;
560 opp-microamp-fast = <71000>;
563 opp-1200000000 {
564 opp-hz = /bits/ 64 <1200000000>;
565 opp-microvolt-slow = <915000 900000 925000>, /* Supply vcc0 */
567 opp-microvolt-fast = <975000 970000 985000>, /* Supply vcc0 */
569 opp-microamp = <70000>; /* Will be used for both slow/fast */
574 Example 7: Single cluster Quad-core ARM cortex A53, OPP points from firmware,
579 #address-cells = <2>;
580 #size-cells = <0>;
583 compatible = "arm,cortex-a53";
585 next-level-cache = <&A53_L2>;
587 operating-points-v2 = <&cpu_opp0_table>;
590 compatible = "arm,cortex-a53";
592 next-level-cache = <&A53_L2>;
594 operating-points-v2 = <&cpu_opp0_table>;
597 compatible = "arm,cortex-a53";
599 next-level-cache = <&A53_L2>;
601 operating-points-v2 = <&cpu_opp1_table>;
604 compatible = "arm,cortex-a53";
606 next-level-cache = <&A53_L2>;
608 operating-points-v2 = <&cpu_opp1_table>;
614 compatible = "operating-points-v2";
615 opp-shared;
619 compatible = "operating-points-v2";
620 opp-shared;