Lines Matching +full:rom +full:- +full:14 +full:h

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Felix Fietkau <nbd@nbd.name>
12 - Lorenzo Bianconi <lorenzo@kernel.org>
13 - Ryder Lee <ryder.lee@mediatek.com>
23 - $ref: ieee80211.yaml#
28 - mediatek,mt76
29 - mediatek,mt7628-wmac
30 - mediatek,mt7622-wmac
31 - mediatek,mt7981-wmac
32 - mediatek,mt7986-wmac
43 power-domains:
46 memory-region:
54 reset-names:
62 clock-names:
64 - const: mcu
65 - const: ap2conn
73 ieee80211-freq-limit: true
75 nvmem-cells:
77 - description: NVMEM cell with EEPROM
79 nvmem-cell-names:
81 - const: eeprom
83 mediatek,eeprom-data:
84 $ref: /schemas/types.yaml#/definitions/uint32-array
88 mediatek,mtd-eeprom:
89 $ref: /schemas/types.yaml#/definitions/phandle-array
91 - items:
92 - description: phandle to MTD partition
93 - description: offset containing EEPROM data
98 big-endian:
101 Specify if the radio eeprom partition is written in big-endian
103 mediatek,eeprom-merge-otp:
108 pulled from the OTP ROM
110 mediatek,disable-radar-background:
124 led-active-low:
129 led-sources:
132 power-limits:
136 "^r[0-9]+":
148 - FCC
149 - ETSI
150 - JP
153 "^txpower-[256]g$":
157 "^b[0-9]+$":
162 $ref: /schemas/types.yaml#/definitions/uint32-array
169 rates-cck:
170 $ref: /schemas/types.yaml#/definitions/uint8-array
174 4 half-dBm per-rate power limit values
176 rates-ofdm:
177 $ref: /schemas/types.yaml#/definitions/uint8-array
181 8 half-dBm per-rate power limit values
183 rates-mcs:
184 $ref: /schemas/types.yaml#/definitions/uint8-matrix
186 Sets of per-rate power limit values for 802.11n/802.11ac
197 rates-ru:
198 $ref: /schemas/types.yaml#/definitions/uint8-matrix
200 Sets of per-rate power limit values for 802.11ax rates
211 txs-delta:
212 $ref: /schemas/types.yaml#/definitions/uint32-array
214 Half-dBm power delta for different numbers of antennas
217 - compatible
218 - reg
223 - |
225 #address-cells = <3>;
226 #size-cells = <2>;
230 ieee80211-freq-limit = <5000000 6000000>;
231 mediatek,mtd-eeprom = <&factory 0x8000>;
232 big-endian;
235 led-sources = <2>;
238 power-limits {
241 txpower-5g {
244 rates-ofdm = /bits/ 8 <23 23 23 23 23 23 23 23>;
245 rates-mcs = /bits/ 8 <1 23 23 23 23 23 23 23 23 23 23>,
247 rates-ru = /bits/ 8 <3 22 22 22 22 22 22 22 22 22 22 22 22>,
252 rates-ofdm = /bits/ 8 <14 14 14 14 14 14 14 14>;
253 rates-mcs = /bits/ 8 <4 14 14 14 14 14 14 14 14 14 14>;
254 txs-delta = <12 9 6>;
255 rates-ru = /bits/ 8 <7 14 14 14 14 14 14 14 14 14 14 14 14>;
263 - |
265 compatible = "mediatek,mt7628-wmac";
268 interrupt-parent = <&cpuintc>;
271 nvmem-cells = <&eeprom>;
272 nvmem-cell-names = "eeprom";
275 - |
276 #include <dt-bindings/interrupt-controller/arm-gic.h>
277 #include <dt-bindings/interrupt-controller/irq.h>
279 compatible = "mediatek,mt7622-wmac";
285 power-domains = <&scpsys 3>;
288 - |
290 compatible = "mediatek,mt7986-wmac";
292 reset-names = "consys";
299 clock-names = "mcu", "ap2conn";
300 memory-region = <&wmcpu_emi>;