Lines Matching +full:queue +full:- +full:rx
1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
26 - snps,dwmac-3.610
27 - snps,dwmac-3.70a
28 - snps,dwmac-3.710
29 - snps,dwmac-4.00
30 - snps,dwmac-4.10a
31 - snps,dwmac-4.20a
32 - snps,dwmac-5.10a
33 - snps,dwmac-5.20
34 - snps,dwxgmac
35 - snps,dwxgmac-2.10
38 - st,spear600-gmac
41 - compatible
51 - allwinner,sun7i-a20-gmac
52 - allwinner,sun8i-a83t-emac
53 - allwinner,sun8i-h3-emac
54 - allwinner,sun8i-r40-gmac
55 - allwinner,sun8i-v3s-emac
56 - allwinner,sun50i-a64-emac
57 - amlogic,meson6-dwmac
58 - amlogic,meson8b-dwmac
59 - amlogic,meson8m2-dwmac
60 - amlogic,meson-gxbb-dwmac
61 - amlogic,meson-axg-dwmac
62 - ingenic,jz4775-mac
63 - ingenic,x1000-mac
64 - ingenic,x1600-mac
65 - ingenic,x1830-mac
66 - ingenic,x2000-mac
67 - loongson,ls2k-dwmac
68 - loongson,ls7a-dwmac
69 - qcom,qcs404-ethqos
70 - qcom,sa8775p-ethqos
71 - qcom,sc8280xp-ethqos
72 - qcom,sm8150-ethqos
73 - renesas,r9a06g032-gmac
74 - renesas,rzn1-gmac
75 - rockchip,px30-gmac
76 - rockchip,rk3128-gmac
77 - rockchip,rk3228-gmac
78 - rockchip,rk3288-gmac
79 - rockchip,rk3328-gmac
80 - rockchip,rk3366-gmac
81 - rockchip,rk3368-gmac
82 - rockchip,rk3588-gmac
83 - rockchip,rk3399-gmac
84 - rockchip,rv1108-gmac
85 - snps,dwmac
86 - snps,dwmac-3.40a
87 - snps,dwmac-3.50a
88 - snps,dwmac-3.610
89 - snps,dwmac-3.70a
90 - snps,dwmac-3.710
91 - snps,dwmac-4.00
92 - snps,dwmac-4.10a
93 - snps,dwmac-4.20a
94 - snps,dwmac-5.10a
95 - snps,dwmac-5.20
96 - snps,dwxgmac
97 - snps,dwxgmac-2.10
98 - starfive,jh7110-dwmac
107 - description: Combined signal for various interrupt events
108 - description: The interrupt to manage the remote wake-up packet detection
109 - description: The interrupt that occurs when Rx exits the LPI state
111 interrupt-names:
114 - const: macirq
115 - enum: [eth_wake_irq, eth_lpi]
116 - const: eth_lpi
123 - description: GMAC main clock
124 - description: Peripheral registers interface clock
125 - description:
130 clock-names:
136 - stmmaceth
137 - pclk
138 - ptp_ref
143 - description: GMAC stmmaceth reset
144 - description: AHB reset
146 reset-names:
149 - const: stmmaceth
150 - const: ahb
152 power-domains:
155 mac-mode:
156 $ref: ethernet-controller.yaml#/properties/phy-connection-type
158 The property is identical to 'phy-mode', and assumes that there is mode
159 converter in-between the MAC & PHY (e.g. GMII-to-RGMII). This converter
163 snps,axi-config:
174 * snps,fb, fixed-burst
175 * snps,mb, mixed-burst
178 snps,mtl-rx-config:
181 Multiple RX Queues parameters. Phandle to a node that
182 implements the 'rx-queues-config' object described in
185 rx-queues-config:
188 snps,rx-queues-to-use:
190 description: number of RX queues to be used in the driver
191 snps,rx-sched-sp:
194 snps,rx-sched-wsp:
198 - if:
200 - snps,rx-sched-sp
203 snps,rx-sched-wsp: false
204 - if:
206 - snps,rx-sched-wsp
209 snps,rx-sched-sp: false
211 "^queue[0-9]$":
212 description: Each subnode represents a queue.
215 snps,dcb-algorithm:
217 description: Queue to be enabled as DCB
218 snps,avb-algorithm:
220 description: Queue to be enabled as AVB
221 snps,map-to-dma-channel:
224 snps,route-avcp:
227 snps,route-ptp:
230 snps,route-dcbcp:
233 snps,route-up:
236 snps,route-multi-broad:
241 description: Bitmask of the tagged frames priorities assigned to the queue
243 - if:
245 - snps,dcb-algorithm
248 snps,avb-algorithm: false
249 - if:
251 - snps,avb-algorithm
254 snps,dcb-algorithm: false
255 - if:
257 - snps,route-avcp
260 snps,route-ptp: false
261 snps,route-dcbcp: false
262 snps,route-up: false
263 snps,route-multi-broad: false
264 - if:
266 - snps,route-ptp
269 snps,route-avcp: false
270 snps,route-dcbcp: false
271 snps,route-up: false
272 snps,route-multi-broad: false
273 - if:
275 - snps,route-dcbcp
278 snps,route-avcp: false
279 snps,route-ptp: false
280 snps,route-up: false
281 snps,route-multi-broad: false
282 - if:
284 - snps,route-up
287 snps,route-avcp: false
288 snps,route-ptp: false
289 snps,route-dcbcp: false
290 snps,route-multi-broad: false
291 - if:
293 - snps,route-multi-broad
296 snps,route-avcp: false
297 snps,route-ptp: false
298 snps,route-dcbcp: false
299 snps,route-up: false
303 snps,mtl-tx-config:
307 implements the 'tx-queues-config' object described in
310 tx-queues-config:
313 snps,tx-queues-to-use:
316 snps,tx-sched-wrr:
319 snps,tx-sched-wfq:
322 snps,tx-sched-dwrr:
325 snps,tx-sched-sp:
329 - if:
331 - snps,tx-sched-wrr
334 snps,tx-sched-wfq: false
335 snps,tx-sched-dwrr: false
336 snps,tx-sched-sp: false
337 - if:
339 - snps,tx-sched-wfq
342 snps,tx-sched-wrr: false
343 snps,tx-sched-dwrr: false
344 snps,tx-sched-sp: false
345 - if:
347 - snps,tx-sched-dwrr
350 snps,tx-sched-wrr: false
351 snps,tx-sched-wfq: false
352 snps,tx-sched-sp: false
353 - if:
355 - snps,tx-sched-sp
358 snps,tx-sched-wrr: false
359 snps,tx-sched-wfq: false
360 snps,tx-sched-dwrr: false
362 "^queue[0-9]$":
363 description: Each subnode represents a queue.
368 description: TX queue weight (if using a DCB weight algorithm)
369 snps,dcb-algorithm:
371 description: TX queue will be working in DCB
372 snps,avb-algorithm:
375 TX queue will be working in AVB.
376 Queue 0 is reserved for legacy traffic and so no AVB is
377 available in this queue.
393 Bitmask of the tagged frames priorities assigned to the queue.
395 the queue is blocked from transmitting for the pause time specified
398 snps,coe-unsupported:
400 description: TX checksum offload is unsupported by the TX queue.
403 - if:
405 - snps,dcb-algorithm
408 snps,avb-algorithm: false
409 - if:
411 - snps,avb-algorithm
414 snps,dcb-algorithm: false
419 snps,reset-gpio:
425 snps,reset-active-low:
431 snps,reset-delays-us:
434 Triplet of delays. The 1st cell is reset pre-delay in micro
436 cell is reset post-delay in micro seconds.
443 Use Address-Aligned Beats
445 snps,fixed-burst:
450 snps,mixed-burst:
458 Force DMA to use the threshold mode for both tx and rx
464 rx. This flag is ignored if force_thresh_dma_mode is set.
466 snps,en-tx-lpi-clockgating:
469 Enable gating of the MAC TX clock during TX low-power mode
471 snps,multicast-filter-bins:
477 snps,perfect-filter-entries:
483 snps,ps-speed:
490 snps,clk-csr:
503 const: snps,dwmac-mdio
506 - compatible
508 stmmac-axi-config:
541 $ref: /schemas/types.yaml#/definitions/uint32-array
550 fixed-burst
555 mixed-burst
563 - compatible
564 - reg
565 - interrupts
566 - interrupt-names
567 - phy-mode
570 snps,reset-active-low: ["snps,reset-gpio"]
571 snps,reset-delays-us: ["snps,reset-gpio"]
574 - $ref: ethernet-controller.yaml#
575 - if:
580 - allwinner,sun7i-a20-gmac
581 - allwinner,sun8i-a83t-emac
582 - allwinner,sun8i-h3-emac
583 - allwinner,sun8i-r40-gmac
584 - allwinner,sun8i-v3s-emac
585 - allwinner,sun50i-a64-emac
586 - ingenic,jz4775-mac
587 - ingenic,x1000-mac
588 - ingenic,x1600-mac
589 - ingenic,x1830-mac
590 - ingenic,x2000-mac
591 - qcom,sa8775p-ethqos
592 - qcom,sc8280xp-ethqos
593 - snps,dwmac-3.50a
594 - snps,dwmac-4.10a
595 - snps,dwmac-4.20a
596 - snps,dwmac-5.20
597 - snps,dwxgmac
598 - snps,dwxgmac-2.10
599 - st,spear600-gmac
605 Programmable Burst Length (tx and rx)
618 Rx Programmable Burst Length. If set, DMA rx will use this
623 snps,no-pbl-x8:
629 - if:
634 - allwinner,sun7i-a20-gmac
635 - allwinner,sun8i-a83t-emac
636 - allwinner,sun8i-h3-emac
637 - allwinner,sun8i-r40-gmac
638 - allwinner,sun8i-v3s-emac
639 - allwinner,sun50i-a64-emac
640 - loongson,ls2k-dwmac
641 - loongson,ls7a-dwmac
642 - ingenic,jz4775-mac
643 - ingenic,x1000-mac
644 - ingenic,x1600-mac
645 - ingenic,x1830-mac
646 - ingenic,x2000-mac
647 - qcom,qcs404-ethqos
648 - qcom,sa8775p-ethqos
649 - qcom,sc8280xp-ethqos
650 - qcom,sm8150-ethqos
651 - snps,dwmac-4.00
652 - snps,dwmac-4.10a
653 - snps,dwmac-4.20a
654 - snps,dwmac-5.10a
655 - snps,dwmac-5.20
656 - snps,dwxgmac
657 - snps,dwxgmac-2.10
658 - st,spear600-gmac
671 - |
673 compatible = "snps,dwxgmac-2.10", "snps,dwxgmac";
675 interrupt-parent = <&vic1>;
677 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
678 mac-address = [000000000000]; /* Filled in by U-Boot */
679 max-frame-size = <3800>;
680 phy-mode = "gmii";
681 snps,multicast-filter-bins = <256>;
682 snps,perfect-filter-entries = <128>;
683 rx-fifo-depth = <16384>;
684 tx-fifo-depth = <16384>;
686 clock-names = "stmmaceth";
687 snps,axi-config = <&stmmac_axi_setup>;
688 snps,mtl-rx-config = <&mtl_rx_setup>;
689 snps,mtl-tx-config = <&mtl_tx_setup>;
691 stmmac_axi_setup: stmmac-axi-config {
697 mtl_rx_setup: rx-queues-config {
698 snps,rx-queues-to-use = <1>;
699 snps,rx-sched-sp;
701 snps,dcb-algorithm;
702 snps,map-to-dma-channel = <0x0>;
707 mtl_tx_setup: tx-queues-config {
708 snps,tx-queues-to-use = <2>;
709 snps,tx-sched-wrr;
712 snps,dcb-algorithm;
717 snps,avb-algorithm;
727 #address-cells = <1>;
728 #size-cells = <0>;
729 compatible = "snps,dwmac-mdio";
730 phy1: ethernet-phy@0 {