Lines Matching full:cru

20  - clocks: <&cru SCLK_MAC>: clock selector for main clock, from PLL or PHY.
21 	   <&cru SCLK_MAC_PLL>: PLL clock for SCLK_MAC
22 	   <&cru SCLK_MAC_RX>: clock gate for RX
23 	   <&cru SCLK_MAC_TX>: clock gate for TX
24 	   <&cru SCLK_MACREF>: clock gate for RMII referce clock
25 	   <&cru SCLK_MACREF_OUT> clock gate for RMII reference clock output
26 	   <&cru ACLK_GMAC>: AXI clock gate for GMAC
27 	   <&cru PCLK_GMAC>: APB clock gate for GMAC
38  - assigned-clocks: main clock, should be <&cru SCLK_MAC>;
40    can be <&ext_gmac> or <&cru SCLK_MAC_PLL>.
55 	clocks = <&cru SCLK_MAC>,
56 		<&cru SCLK_MAC_RX>, <&cru SCLK_MAC_TX>,
57 		<&cru SCLK_MACREF>, <&cru SCLK_MACREF_OUT>,
58 		<&cru ACLK_GMAC>, <&cru PCLK_GMAC>;
71 	assigned-clocks = <&cru SCLK_MAC>;