Lines Matching +full:port +full:- +full:id
6 - compatible:
8 - "nxp,sja1105e"
9 - "nxp,sja1105t"
10 - "nxp,sja1105p"
11 - "nxp,sja1105q"
12 - "nxp,sja1105r"
13 - "nxp,sja1105s"
15 Although the device ID could be detected at runtime, explicit bindings
17 For example, SGMII can only be specified on port 4 of R and S devices,
18 and the non-SGMII devices, while pin-compatible, are not equal in terms
24 - sja1105,role-mac:
25 - sja1105,role-phy:
26 Boolean properties that can be assigned under each port node. By
27 default (unless otherwise specified) a port is configured as MAC if it
28 is driving a PHY (phy-handle is present) or as PHY if it is PHY-less
29 (fixed-link specified, presumably because it is connected to a MAC).
32 - In the case of MII or RMII it specifies whether the SJA1105 port is a
35 - In the case of RGMII it affects the behavior regarding internal
37 1. If sja1105,role-mac is specified, and the phy-mode property is one
38 of "rgmii-id", "rgmii-txid" or "rgmii-rxid", then the entity
41 2. If sja1105,role-phy is specified, and the phy-mode property is one
43 is the SJA1105 MAC (if hardware-supported). This is only supported
44 by the second-generation (P/Q/R/S) hardware. On a first-generation
45 E or T device, it is an error to specify an RGMII phy-mode other
46 than "rgmii" for a port that is in fixed-link mode. In that case,
48 the fixed-link, or by PCB serpentine traces on the board.
50 ports are at both ends of a MII/RMII PHY-less setup. One end would need
51 to have sja1105,role-mac, while the other sja1105,role-phy.
57 ------------------
59 The SJA1105 SPI interface requires a CS-to-CLK time (t2 in UM10944) of at least
65 -------
67 Ethernet switch connected via SPI to the host, CPU port wired to enet2:
69 arch/arm/boot/dts/ls1021a-tsn.dts:
75 #address-cells = <1>;
76 #size-cells = <0>;
78 spi-max-frequency = <4000000>;
79 fsl,spi-cs-sck-delay = <1000>;
80 fsl,spi-sck-cs-delay = <1000>;
82 #address-cells = <1>;
83 #size-cells = <0>;
84 port@0 {
87 phy-handle = <&rgmii_phy6>;
88 phy-mode = "rgmii-id";
90 /* Implicit "sja1105,role-mac;" */
92 port@1 {
95 phy-handle = <&rgmii_phy3>;
96 phy-mode = "rgmii-id";
98 /* Implicit "sja1105,role-mac;" */
100 port@2 {
103 phy-handle = <&rgmii_phy4>;
104 phy-mode = "rgmii-id";
106 /* Implicit "sja1105,role-mac;" */
108 port@3 {
110 phy-handle = <&rgmii_phy5>;
112 phy-mode = "rgmii-id";
114 /* Implicit "sja1105,role-mac;" */
116 port@4 {
117 /* Internal port connected to eth2 */
119 phy-mode = "rgmii";
121 /* Implicit "sja1105,role-phy;" */
122 fixed-link {
124 full-duplex;
134 rgmii_phy3: ethernet-phy@3 {
137 rgmii_phy4: ethernet-phy@4 {
140 rgmii_phy5: ethernet-phy@5 {
143 rgmii_phy6: ethernet-phy@6 {
148 /* Ethernet master port of the LS1021 */
150 phy-connection-type = "rgmii";
152 fixed-link {
154 full-duplex;