Lines Matching +full:rtl8364nb +full:- +full:vb
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: dsa.yaml#/$defs/ethernet-ports
13 - Linus Walleij <linus.walleij@linaro.org>
20 The SMI "Simple Management Interface" is a two-wire protocol using
21 bit-banged GPIO that while it reuses the MDIO lines MCK and MDIO does
23 SMI-based Realtek devices. The realtek-smi driver is a platform driver
26 The MDIO-connected switches use MDIO protocol to access their registers.
27 The realtek-mdio driver is an MDIO driver and it must be inserted inside
40 - realtek,rtl8365mb
41 - realtek,rtl8366rb
44 Use with models RTL8363NB, RTL8363NB-VB, RTL8363SC, RTL8363SC-VB,
45 RTL8364NB, RTL8364NB-VB, RTL8365MB, RTL8366SC, RTL8367RB-VB, RTL8367S,
50 mdc-gpios:
54 mdio-gpios:
58 reset-gpios:
62 realtek,disable-leds:
69 interrupt-controller:
82 interrupt-controller: true
89 '#address-cells':
92 '#interrupt-cells':
96 - interrupt-controller
97 - '#address-cells'
98 - '#interrupt-cells'
106 const: realtek,smi-mdio
110 - reg
113 $ref: /schemas/spi/spi-peripheral-props.yaml#
116 - mdc-gpios
117 - mdio-gpios
118 - mdio
121 mdc-gpios: false
122 mdio-gpios: false
127 - mdc-gpios
128 - mdio-gpios
129 - mdio
130 - reset-gpios
133 - compatible
135 # - mdc-gpios
136 # - mdio-gpios
137 # - reset-gpios
138 # - mdio
143 - |
144 #include <dt-bindings/gpio/gpio.h>
145 #include <dt-bindings/interrupt-controller/irq.h>
151 mdc-gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;
152 mdio-gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
153 reset-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
155 switch_intc1: interrupt-controller {
157 interrupt-parent = <&gpio0>;
159 interrupt-controller;
160 #address-cells = <0>;
161 #interrupt-cells = <1>;
165 #address-cells = <1>;
166 #size-cells = <0>;
170 phy-handle = <&phy0>;
175 phy-handle = <&phy1>;
180 phy-handle = <&phy2>;
185 phy-handle = <&phy3>;
190 phy-handle = <&phy4>;
195 phy-mode = "rgmii";
196 fixed-link {
198 full-duplex;
204 compatible = "realtek,smi-mdio";
205 #address-cells = <1>;
206 #size-cells = <0>;
208 phy0: ethernet-phy@0 {
210 interrupt-parent = <&switch_intc1>;
213 phy1: ethernet-phy@1 {
215 interrupt-parent = <&switch_intc1>;
218 phy2: ethernet-phy@2 {
220 interrupt-parent = <&switch_intc1>;
223 phy3: ethernet-phy@3 {
225 interrupt-parent = <&switch_intc1>;
228 phy4: ethernet-phy@4 {
230 interrupt-parent = <&switch_intc1>;
237 - |
238 #include <dt-bindings/gpio/gpio.h>
239 #include <dt-bindings/interrupt-controller/irq.h>
244 mdc-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
245 mdio-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
246 reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
248 switch_intc2: interrupt-controller {
249 interrupt-parent = <&gpio5>;
251 interrupt-controller;
252 #address-cells = <0>;
253 #interrupt-cells = <1>;
257 #address-cells = <1>;
258 #size-cells = <0>;
262 phy-handle = <ðphy0>;
267 phy-handle = <ðphy1>;
272 phy-handle = <ðphy2>;
277 phy-handle = <ðphy3>;
282 phy-mode = "rgmii";
283 tx-internal-delay-ps = <2000>;
284 rx-internal-delay-ps = <2000>;
286 fixed-link {
288 full-duplex;
295 compatible = "realtek,smi-mdio";
296 #address-cells = <1>;
297 #size-cells = <0>;
299 ethphy0: ethernet-phy@0 {
301 interrupt-parent = <&switch_intc2>;
304 ethphy1: ethernet-phy@1 {
306 interrupt-parent = <&switch_intc2>;
309 ethphy2: ethernet-phy@2 {
311 interrupt-parent = <&switch_intc2>;
314 ethphy3: ethernet-phy@3 {
316 interrupt-parent = <&switch_intc2>;
323 - |
324 #include <dt-bindings/gpio/gpio.h>
325 #include <dt-bindings/interrupt-controller/irq.h>
328 #address-cells = <1>;
329 #size-cells = <0>;
335 reset-gpios = <&gpio2 20 GPIO_ACTIVE_LOW>;
337 switch_intc3: interrupt-controller {
338 interrupt-parent = <&gpio0>;
340 interrupt-controller;
341 #address-cells = <0>;
342 #interrupt-cells = <1>;
346 #address-cells = <1>;
347 #size-cells = <0>;
377 phy-mode = "rgmii";
378 tx-internal-delay-ps = <2000>;
379 rx-internal-delay-ps = <0>;
381 fixed-link {
383 full-duplex;