Lines Matching +full:connect +full:- +full:gpios
5 - compatible: should be one of:
10 - #size-cells: must be 0
11 - #address-cells: must be 1
15 - reset-gpios: GPIO to be used to reset the whole device
20 described in dsa/dsa.txt. If the QCA8K switch is connect to a SoC's external
21 mdio-bus each subnode describing a port needs to have a valid phandle
24 To declare the internal mdio-bus configuration, declare a mdio node in the
26 PHY is connected to. In this config a internal mdio-bus is registered and
29 Don't use mixed external and internal mdio-bus configurations, as this is
36 - fixed-link : Fixed-link subnode describing a link to a non-MDIO
38 Documentation/devicetree/bindings/net/fixed-link.txt
41 For QCA8K the 'fixed-link' sub-node supports only the following properties:
43 - 'speed' (integer, mandatory), to indicate the link speed. Accepted
45 - 'full-duplex' (boolean, optional), to indicate that full duplex is
50 for the external mdio-bus configuration:
75 #address-cells = <1>;
76 #size-cells = <0>;
78 reset-gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
82 #address-cells = <1>;
83 #size-cells = <0>;
88 phy-mode = "rgmii";
89 fixed-link {
91 full-duplex;
98 phy-handle = <&phy_port1>;
104 phy-handle = <&phy_port2>;
110 phy-handle = <&phy_port3>;
116 phy-handle = <&phy_port4>;
122 phy-handle = <&phy_port5>;
128 for the internal master mdio-bus configuration:
133 #address-cells = <1>;
134 #size-cells = <0>;
136 reset-gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
140 #address-cells = <1>;
141 #size-cells = <0>;
147 phy-mode = "rgmii";
148 fixed-link {
150 full-duplex;
157 phy-mode = "internal";
158 phy-handle = <&phy_port1>;
164 phy-mode = "internal";
165 phy-handle = <&phy_port2>;
171 phy-mode = "internal";
172 phy-handle = <&phy_port3>;
178 phy-mode = "internal";
179 phy-handle = <&phy_port4>;
185 phy-mode = "internal";
186 phy-handle = <&phy_port5>;
191 #address-cells = <1>;
192 #size-cells = <0>;