Lines Matching +full:ocelot +full:- +full:1
1 Microchip Ocelot switch driver family
5 -----
9 - VSC9959 (Felix)
10 - VSC9953 (Seville)
13 larger ENETC root complex. As a result, the ethernet-switch node is a sub-node
25 For the external switch ports, depending on board configuration, "phy-mode" and
26 "phy-handle" are populated by board specific device tree instances. Ports 4 and
30 the Ocelot hardware core. The CPU port in Ocelot is a set of queues, which are
32 By default, in fsl-ls1028a.dtsi, the NPI port is assigned to the internal
33 2.5Gbps port@4, but can be moved to the 1Gbps port@5, depending on the specific
39 Any port can be disabled (and in fsl-ls1028a.dtsi, they are indeed all disabled
40 by default, and should be enabled on a per-board basis). But if any external
50 * phy_mode = "sgmii": on ports 0, 1, 2, 3
51 * phy_mode = "qsgmii": on ports 0, 1, 2, 3
52 * phy_mode = "usxgmii": on ports 0, 1, 2, 3
53 * phy_mode = "2500base-x": on ports 0, 1, 2, 3
64 pcie@1f0000000 { /* Integrated Endpoint Root Complex */
65 ethernet-switch@0,5 {
71 #address-cells = <1>;
72 #size-cells = <0>;
80 port@1 {
81 reg = <1>;
99 phy-mode = "internal";
101 fixed-link {
103 full-duplex;
107 /* Non-tagging CPU port */
110 phy-mode = "internal";
113 fixed-link {
115 full-duplex;
126 - compatible:
127 Must be "mscc,vsc9953-switch".
133 * phy_mode = "sgmii": on ports 0, 1, 2, 3, 4, 5, 6, 7
134 * phy_mode = "qsgmii": on ports 0, 1, 2, 3, 4, 5, 6, 7
139 ethernet-switch@800000 {
140 #address-cells = <0x1>;
141 #size-cells = <0x0>;
142 compatible = "mscc,vsc9953-switch";
143 little-endian;
147 #address-cells = <0x1>;
148 #size-cells = <0x0>;
155 port@1 {
192 phy-mode = "internal";
195 fixed-link {
197 full-duplex;
203 phy-mode = "internal";
206 fixed-link {
208 full-duplex;