Lines Matching +full:synclko +full:- +full:125
1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Vasut <marex@denx.de>
11 - Woojung Huh <Woojung.Huh@microchip.com>
14 - $ref: /schemas/spi/spi-peripheral-props.yaml#
21 - microchip,ksz8765
22 - microchip,ksz8794
23 - microchip,ksz8795
24 - microchip,ksz8863
25 - microchip,ksz8873
26 - microchip,ksz9477
27 - microchip,ksz9897
28 - microchip,ksz9896
29 - microchip,ksz9567
30 - microchip,ksz8565
31 - microchip,ksz9893
32 - microchip,ksz9563
33 - microchip,ksz8563
35 reset-gpios:
40 wakeup-source: true
42 microchip,synclko-125:
45 Set if the output SYNCLKO frequency should be set to 125MHz instead of 25MHz.
47 microchip,synclko-disable:
50 Set if the output SYNCLKO clock should be disabled. Do not mix with
51 microchip,synclko-125.
53 microchip,io-drive-strength-microamp:
59 microchip,hi-drive-strength-microamp:
66 microchip,lo-drive-strength-microamp:
77 - compatible
78 - reg
85 - microchip,ksz8863
86 - microchip,ksz8873
88 $ref: dsa.yaml#/$defs/ethernet-ports
91 "^(ethernet-)?ports$":
93 "^(ethernet-)?port@[0-2]$":
94 $ref: dsa-port.yaml#
97 microchip,rmii-clk-internal:
107 If microchip,rmii-clk-internal is set, ksz88x3 will provide
111 microchip,rmii-clk-internal: [ethernet]
116 - |
117 #include <dt-bindings/gpio/gpio.h>
121 fixed-link {
123 full-duplex;
128 #address-cells = <1>;
129 #size-cells = <0>;
131 pinctrl-0 = <&pinctrl_spi_ksz>;
132 cs-gpios = <&pioC 25 0>;
138 reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
140 spi-max-frequency = <44000000>;
142 ethernet-ports {
143 #address-cells = <1>;
144 #size-cells = <0>;
168 phy-mode = "rgmii";
170 fixed-link {
172 full-duplex;
182 spi-max-frequency = <44000000>;
184 ethernet-ports {
185 #address-cells = <1>;
186 #size-cells = <0>;
206 phy-mode = "rgmii";
208 fixed-link {
210 full-duplex;