Lines Matching +full:2500 +full:base +full:- +full:x
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Landen Chao <Landen.Chao@mediatek.com>
12 - DENG Qingfang <dqfext@gmail.com>
13 - Sean Wang <sean.wang@mediatek.com>
14 - Daniel Golle <daniel@makrotopia.org>
17 There are three versions of MT7530, standalone, in a multi-chip module and
18 built-into a SoC.
20 MT7530 is a part of the multi-chip module in MT7620AN, MT7620DA, MT7620DAN,
23 The MT7988 SoC comes with a built-in switch similar to MT7531 as well as four
26 CPU port and 4 user ports connected to the built-in Gigabit Ethernet PHYs.
36 - Port 5 can be used as a CPU port.
38 - PHY 0 or 4 of the switch can be muxed to gmac5 of the switch. Therefore,
43 The driver looks up the reg on the ethernet-phy node, which the phy-handle
46 The driver requires the gmac of the SoC to have "mediatek,eth-mac" as the
48 MediaTek SoC can benefit this. Banana Pi BPI-R2 suits this.
54 - For the multi-chip module MT7530, in case of an external phy wired to
63 - Port 5 can be wired to an external phy. Port 5 becomes a DSA user port.
65 For the multi-chip module MT7530, the external phy must be wired TX to TX
66 to gmac1 of the SoC for this to work. Ubiquiti EdgeRouter X SFP is wired
69 For the multi-chip module MT7530, muxing PHY 0 or 4 won't work when the
79 - description:
80 Standalone MT7530 and multi-chip module MT7530 in MT7623AI SoC
83 - description:
87 - description:
88 Multi-chip module MT7530 in MT7621AT, MT7621DAT and MT7621ST SoCs
91 - description:
92 Built-in switch of the MT7988 SoC
93 const: mediatek,mt7988-switch
98 core-supply:
102 "#gpio-cells":
105 gpio-controller:
117 "#interrupt-cells":
120 interrupt-controller: true
125 io-supply:
128 See Documentation/devicetree/bindings/regulator/mt6323-regulator.txt for
135 switch is a part of the multi-chip module.
137 reset-gpios:
145 reset-names:
155 "^(ethernet-)?ports$":
160 "^(ethernet-)?port@[0-6]$":
171 - if:
177 - 5
178 - 6
181 - compatible
182 - reg
185 mt7530-dsa-port:
187 "^(ethernet-)?ports$":
189 "^(ethernet-)?port@[0-6]$":
199 phy-mode:
201 - gmii
202 - mii
203 - rgmii
206 phy-mode:
208 - rgmii
209 - trgmii
211 mt7531-dsa-port:
213 "^(ethernet-)?ports$":
215 "^(ethernet-)?port@[0-6]$":
225 phy-mode:
227 - 1000base-x
228 - 2500base-x
229 - rgmii
230 - sgmii
233 phy-mode:
235 - 1000base-x
236 - 2500base-x
237 - sgmii
240 - $ref: dsa.yaml#/$defs/ethernet-ports
241 - if:
243 - mediatek,mcm
246 reset-gpios: false
249 - resets
250 - reset-names
252 - dependencies:
253 interrupt-controller: [ interrupts ]
255 - if:
260 $ref: "#/$defs/mt7530-dsa-port"
262 - core-supply
263 - io-supply
265 - if:
270 $ref: "#/$defs/mt7531-dsa-port"
272 gpio-controller: false
275 - if:
280 $ref: "#/$defs/mt7530-dsa-port"
282 - mediatek,mcm
284 - if:
287 const: mediatek,mt7988-switch
289 $ref: "#/$defs/mt7530-dsa-port"
291 gpio-controller: false
293 reset-names: false
299 - |
300 #include <dt-bindings/gpio/gpio.h>
303 #address-cells = <1>;
304 #size-cells = <0>;
310 reset-gpios = <&pio 33 0>;
312 core-supply = <&mt6323_vpa_reg>;
313 io-supply = <&mt6323_vemc3v3_reg>;
315 ethernet-ports {
316 #address-cells = <1>;
317 #size-cells = <0>;
347 phy-mode = "rgmii";
349 fixed-link {
351 full-duplex;
360 - |
361 #include <dt-bindings/reset/mt2701-resets.h>
364 #address-cells = <1>;
365 #size-cells = <0>;
373 reset-names = "mcm";
375 core-supply = <&mt6323_vpa_reg>;
376 io-supply = <&mt6323_vemc3v3_reg>;
378 ethernet-ports {
379 #address-cells = <1>;
380 #size-cells = <0>;
410 phy-mode = "trgmii";
412 fixed-link {
414 full-duplex;
423 - |
424 #include <dt-bindings/gpio/gpio.h>
425 #include <dt-bindings/interrupt-controller/irq.h>
428 #address-cells = <1>;
429 #size-cells = <0>;
435 reset-gpios = <&pio 54 0>;
437 interrupt-controller;
438 #interrupt-cells = <1>;
439 interrupt-parent = <&pio>;
442 ethernet-ports {
443 #address-cells = <1>;
444 #size-cells = <0>;
474 phy-mode = "2500base-x";
476 fixed-link {
477 speed = <2500>;
478 full-duplex;
487 - |
488 #include <dt-bindings/interrupt-controller/mips-gic.h>
489 #include <dt-bindings/reset/mt7621-reset.h>
492 #address-cells = <1>;
493 #size-cells = <0>;
501 reset-names = "mcm";
503 interrupt-controller;
504 #interrupt-cells = <1>;
505 interrupt-parent = <&gic>;
508 ethernet-ports {
509 #address-cells = <1>;
510 #size-cells = <0>;
540 phy-mode = "trgmii";
542 fixed-link {
544 full-duplex;
553 - |
554 #include <dt-bindings/interrupt-controller/mips-gic.h>
555 #include <dt-bindings/reset/mt7621-reset.h>
558 #address-cells = <1>;
559 #size-cells = <0>;
561 pinctrl-names = "default";
562 pinctrl-0 = <&rgmii2_pins>;
565 compatible = "mediatek,eth-mac";
568 phy-mode = "rgmii";
569 phy-handle = <&example5_ethphy4>;
573 #address-cells = <1>;
574 #size-cells = <0>;
577 example5_ethphy4: ethernet-phy@4 {
587 reset-names = "mcm";
589 interrupt-controller;
590 #interrupt-cells = <1>;
591 interrupt-parent = <&gic>;
594 ethernet-ports {
595 #address-cells = <1>;
596 #size-cells = <0>;
628 phy-mode = "trgmii";
630 fixed-link {
632 full-duplex;
642 - |
643 #include <dt-bindings/interrupt-controller/mips-gic.h>
644 #include <dt-bindings/reset/mt7621-reset.h>
647 #address-cells = <1>;
648 #size-cells = <0>;
650 pinctrl-names = "default";
651 pinctrl-0 = <&rgmii2_pins>;
654 compatible = "mediatek,eth-mac";
657 phy-mode = "rgmii";
658 phy-handle = <&example6_ethphy7>;
662 #address-cells = <1>;
663 #size-cells = <0>;
666 example6_ethphy7: ethernet-phy@7 {
668 phy-mode = "rgmii";
677 reset-names = "mcm";
679 interrupt-controller;
680 #interrupt-cells = <1>;
681 interrupt-parent = <&gic>;
684 ethernet-ports {
685 #address-cells = <1>;
686 #size-cells = <0>;
716 phy-mode = "trgmii";
718 fixed-link {
720 full-duplex;
730 - |
731 #include <dt-bindings/interrupt-controller/mips-gic.h>
732 #include <dt-bindings/reset/mt7621-reset.h>
735 #address-cells = <1>;
736 #size-cells = <0>;
738 pinctrl-names = "default";
739 pinctrl-0 = <&rgmii2_pins>;
742 #address-cells = <1>;
743 #size-cells = <0>;
746 example7_ethphy7: ethernet-phy@7 {
748 phy-mode = "rgmii";
757 reset-names = "mcm";
759 interrupt-controller;
760 #interrupt-cells = <1>;
761 interrupt-parent = <&gic>;
764 ethernet-ports {
765 #address-cells = <1>;
766 #size-cells = <0>;
796 phy-mode = "rgmii-txid";
797 phy-handle = <&example7_ethphy7>;
803 phy-mode = "trgmii";
805 fixed-link {
807 full-duplex;