Lines Matching +full:stop +full:- +full:mode

1 Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC).
5 - compatible : Should be "fsl,<processor>-flexcan"
10   - fsl,p1010-flexcan
12 - reg : Offset and length of the register set for this device
13 - interrupts : Interrupt tuple for this device
17 - clock-frequency : The oscillator frequency driving the flexcan device
19 - xceiver-supply: Regulator that powers the CAN transceiver
21 - big-endian: This means the registers of FlexCAN controller are big endian.
27 - fsl,stop-mode: register bits of stop mode control, the format is
30 		 req_gpr is the gpr register offset of CAN stop request.
31 		 req_bit is the bit offset of CAN stop request.
32 		 ack_gpr is the gpr register offset of CAN stop acknowledge.
33 		 ack_bit is the bit offset of CAN stop acknowledge.
35 - fsl,clk-source: Select the clock source to the CAN Protocol Engine (PE).
42 - wakeup-source: enable CAN remote wakeup
47 		compatible = "fsl,p1010-flexcan";
50 		interrupt-parent = <&mpic>;
51 		clock-frequency = <200000000>; // filled in by bootloader
52 		fsl,clk-source = <0>; // select clock source 0 for PE