Lines Matching +full:syscon +full:- +full:rgmii +full:- +full:delay
1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 - const: allwinner,sun8i-a83t-emac
17 - const: allwinner,sun8i-h3-emac
18 - const: allwinner,sun8i-r40-gmac
19 - const: allwinner,sun8i-v3s-emac
20 - const: allwinner,sun50i-a64-emac
21 - items:
22 - enum:
23 - allwinner,sun20i-d1-emac
24 - allwinner,sun50i-h6-emac
25 - allwinner,sun50i-h616-emac0
26 - const: allwinner,sun50i-a64-emac
34 interrupt-names:
40 clock-names:
43 phy-supply:
46 syscon:
53 - compatible
54 - reg
55 - interrupts
56 - interrupt-names
57 - clocks
58 - clock-names
59 - resets
60 - reset-names
61 - phy-handle
62 - phy-mode
63 - syscon
66 - $ref: snps,dwmac.yaml#
67 - if:
72 - allwinner,sun8i-a83t-emac
73 - allwinner,sun8i-h3-emac
74 - allwinner,sun8i-v3s-emac
75 - allwinner,sun50i-a64-emac
79 allwinner,tx-delay-ps:
85 External RGMII PHY TX clock delay chain value in ps.
87 allwinner,rx-delay-ps:
93 External RGMII PHY TX clock delay chain value in ps.
95 - if:
100 - allwinner,sun8i-r40-gmac
104 allwinner,rx-delay-ps:
110 External RGMII PHY TX clock delay chain value in ps.
112 - if:
117 - allwinner,sun8i-h3-emac
118 - allwinner,sun8i-v3s-emac
122 allwinner,leds-active-low:
127 mdio-mux:
133 const: allwinner,sun8i-h3-mdio-mux
135 mdio-parent-bus:
140 "#address-cells":
143 "#size-cells":
153 const: allwinner,sun8i-h3-mdio-internal
159 "^ethernet-phy@[0-9a-f]$":
161 $ref: ethernet-phy.yaml#
174 - clocks
175 - resets
188 - compatible
189 - mdio-parent-bus
190 - mdio@1
195 - |
197 compatible = "allwinner,sun8i-h3-emac";
198 syscon = <&syscon>;
201 interrupt-names = "macirq";
203 reset-names = "stmmaceth";
205 clock-names = "stmmaceth";
207 phy-handle = <&int_mii_phy>;
208 phy-mode = "mii";
209 allwinner,leds-active-low;
212 #address-cells = <1>;
213 #size-cells = <0>;
214 compatible = "snps,dwmac-mdio";
217 mdio-mux {
218 compatible = "allwinner,sun8i-h3-mdio-mux";
219 #address-cells = <1>;
220 #size-cells = <0>;
222 mdio-parent-bus = <&mdio1>;
225 compatible = "allwinner,sun8i-h3-mdio-internal";
227 #address-cells = <1>;
228 #size-cells = <0>;
230 ethernet-phy@1 {
234 phy-is-integrated;
240 #address-cells = <1>;
241 #size-cells = <0>;
246 - |
248 compatible = "allwinner,sun8i-h3-emac";
249 syscon = <&syscon>;
252 interrupt-names = "macirq";
254 reset-names = "stmmaceth";
256 clock-names = "stmmaceth";
258 phy-handle = <&ext_rgmii_phy>;
259 phy-mode = "rgmii";
260 allwinner,leds-active-low;
263 #address-cells = <1>;
264 #size-cells = <0>;
265 compatible = "snps,dwmac-mdio";
268 mdio-mux {
269 compatible = "allwinner,sun8i-h3-mdio-mux";
270 #address-cells = <1>;
271 #size-cells = <0>;
272 mdio-parent-bus = <&mdio2>;
275 compatible = "allwinner,sun8i-h3-mdio-internal";
277 #address-cells = <1>;
278 #size-cells = <0>;
280 ethernet-phy@1 {
289 #address-cells = <1>;
290 #size-cells = <0>;
292 ext_rgmii_phy: ethernet-phy@1 {
299 - |
301 compatible = "allwinner,sun8i-a83t-emac";
302 syscon = <&syscon>;
305 interrupt-names = "macirq";
307 reset-names = "stmmaceth";
309 clock-names = "stmmaceth";
310 phy-handle = <&ext_rgmii_phy1>;
311 phy-mode = "rgmii";
314 compatible = "snps,dwmac-mdio";
315 #address-cells = <1>;
316 #size-cells = <0>;
318 ext_rgmii_phy1: ethernet-phy@1 {